JBR-6711: java/awt/LightweightDispatcher/LWDispatcherMemoryLeakTest.java: JButton JPanel not collected.

Fixes the patch of JBR-3697 so that sun.awt.X11InputMethodBase#removeNotify unsets its references to tracked components thus not preventing GC from collecting them.

.github/actions/get-bootjdk/action.yml

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2022, 2023, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -104,6 +104,6 @@ runs:
     - name: 'Export path to where BootJDK is installed'
       id: path-name
       run: |
-        # Export the absolute path
-        echo "path=`pwd`/bootjdk/jdk" >> $GITHUB_OUTPUT
+        # Export the path
+        echo 'path=bootjdk/jdk' >> $GITHUB_OUTPUT
       shell: bash

.github/actions/get-gtest/action.yml

@@ -40,7 +40,7 @@ runs:
         var: GTEST_VERSION
 
     - name: 'Checkout GTest source'
-      uses: actions/checkout@v4
+      uses: actions/checkout@v3
       with:
         repository: google/googletest
         ref: 'release-${{ steps.version.outputs.value }}'

.github/actions/get-jtreg/action.yml

@@ -47,7 +47,7 @@ runs:
         key: jtreg-${{ steps.version.outputs.value }}
 
     - name: 'Checkout the JTReg source'
-      uses: actions/checkout@v4
+      uses: actions/checkout@v3
       with:
         repository: openjdk/jtreg
         ref: jtreg-${{ steps.version.outputs.value }}

.github/scripts/gen-test-results.sh

@@ -1,6 +1,6 @@
 #!/bin/bash
 #
-# Copyright (c) 2022, 2024, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2022, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -44,8 +44,8 @@ for test in $failures $errors; do
   base_path="$(echo "$test" | tr '#' '_')"
   report_file="$report_dir/$base_path.jtr"
   hs_err_files=$(ls $report_dir/$base_path/hs_err*.log 2> /dev/null || true)
-  replay_files=$(ls $report_dir/$base_path/replay*.log 2> /dev/null || true)
   echo "####  <a id="$anchor">$test"
+
   echo '<details><summary>View test results</summary>'
   echo ''
   echo '```'
@@ -73,20 +73,6 @@ for test in $failures $errors; do
     echo ''
   fi
 
-  if [[ "$replay_files" != "" ]]; then
-    echo '<details><summary>View HotSpot replay file</summary>'
-    echo ''
-    for replay in $replay_files; do
-      echo '```'
-      echo "$replay:"
-      echo ''
-      cat "$replay"
-      echo '```'
-    done
-
-    echo '</details>'
-    echo ''
-  fi
 done >> $GITHUB_STEP_SUMMARY
 
 # With many failures, the summary can easily exceed 1024 kB, the limit set by Github

.github/scripts/gen-test-summary.sh

@@ -42,7 +42,6 @@ error_count=$(echo $errors | wc -w || true)
 
 if [[ "$failures" = "" && "$errors" = "" ]]; then
   # We know something went wrong, but not what
-  echo 'failure=true' >> $GITHUB_OUTPUT
   echo 'error-message=Unspecified test suite failure. Please see log for job for details.' >> $GITHUB_OUTPUT
   exit 0
 fi

.github/workflows/build-cross-compile.yml

@@ -85,7 +85,7 @@ jobs:
 
     steps:
       - name: 'Checkout the JDK source'
-        uses: actions/checkout@v4
+        uses: actions/checkout@v3
 
       - name: 'Get the BootJDK'
         id: bootjdk
@@ -100,10 +100,6 @@ jobs:
         with:
           platform: linux-x64
 
-      - name: 'Get GTest'
-        id: gtest
-        uses: ./.github/actions/get-gtest
-
         # Upgrading apt to solve libc6 installation bugs, see JDK-8260460.
       - name: 'Install toolchain and dependencies'
         run: |
@@ -159,7 +155,6 @@ jobs:
           --with-conf-name=linux-${{ matrix.target-cpu }}
           --with-version-opt=${GITHUB_ACTOR}-${GITHUB_SHA}
           --with-boot-jdk=${{ steps.bootjdk.outputs.path }}
-          --with-gtest=${{ steps.gtest.outputs.path }}
           --with-zlib=system
           --enable-debug
           --disable-precompiled-headers

.github/workflows/build-linux.yml

@@ -78,7 +78,7 @@ jobs:
 
     steps:
       - name: 'Checkout the JDK source'
-        uses: actions/checkout@v4
+        uses: actions/checkout@v3
 
       - name: 'Get the BootJDK'
         id: bootjdk

.github/workflows/build-macos.yml

@@ -68,7 +68,7 @@ jobs:
 
     steps:
       - name: 'Checkout the JDK source'
-        uses: actions/checkout@v4
+        uses: actions/checkout@v3
 
       - name: 'Get the BootJDK'
         id: bootjdk

.github/workflows/build-windows.yml

@@ -79,7 +79,7 @@ jobs:
 
     steps:
       - name: 'Checkout the JDK source'
-        uses: actions/checkout@v4
+        uses: actions/checkout@v3
 
       - name: 'Get MSYS2'
         uses: ./.github/actions/get-msys2

.github/workflows/test.yml

@@ -60,10 +60,7 @@ jobs:
           - 'jdk/tier1 part 3'
           - 'langtools/tier1'
           - 'hs/tier1 common'
-          - 'hs/tier1 compiler part 1'
-          - 'hs/tier1 compiler part 2'
-          - 'hs/tier1 compiler part 3'
-          - 'hs/tier1 compiler not-xcomp'
+          - 'hs/tier1 compiler'
           - 'hs/tier1 gc'
           - 'hs/tier1 runtime'
           - 'hs/tier1 serviceability'
@@ -86,20 +83,8 @@ jobs:
             test-suite: 'test/hotspot/jtreg/:tier1_common'
             debug-suffix: -debug
 
-          - test-name: 'hs/tier1 compiler part 1'
-            test-suite: 'test/hotspot/jtreg/:tier1_compiler_1'
-            debug-suffix: -debug
-
-          - test-name: 'hs/tier1 compiler part 2'
-            test-suite: 'test/hotspot/jtreg/:tier1_compiler_2'
-            debug-suffix: -debug
-
-          - test-name: 'hs/tier1 compiler part 3'
-            test-suite: 'test/hotspot/jtreg/:tier1_compiler_3'
-            debug-suffix: -debug
-
-          - test-name: 'hs/tier1 compiler not-xcomp'
-            test-suite: 'test/hotspot/jtreg/:tier1_compiler_not_xcomp'
+          - test-name: 'hs/tier1 compiler'
+            test-suite: 'test/hotspot/jtreg/:tier1_compiler'
             debug-suffix: -debug
 
           - test-name: 'hs/tier1 gc'
@@ -120,7 +105,7 @@ jobs:
 
     steps:
       - name: 'Checkout the JDK source'
-        uses: actions/checkout@v4
+        uses: actions/checkout@v3
 
       - name: 'Get MSYS2'
         uses: ./.github/actions/get-msys2

.jcheck/conf

@@ -1,7 +1,7 @@
 [general]
 project=jdk-updates
 jbs=JDK
-version=17.0.11
+version=17.0.9
 
 [checks]
 error=author,committer,reviewers,merge,issues,executable,symlink,message,hg-tag,whitespace,problemlists

doc/building.html

@@ -175,22 +175,22 @@
 <table>
 <thead>
 <tr class="header">
-<th>Operating system</th>
-<th>Vendor/version used</th>
+<th style="text-align: left;">Operating system</th>
+<th style="text-align: left;">Vendor/version used</th>
 </tr>
 </thead>
 <tbody>
 <tr class="odd">
-<td>Linux</td>
-<td>Oracle Enterprise Linux 6.4 / 7.6</td>
+<td style="text-align: left;">Linux</td>
+<td style="text-align: left;">Oracle Enterprise Linux 6.4 / 7.6</td>
 </tr>
 <tr class="even">
-<td>macOS</td>
-<td>Mac OS X 10.13 (High Sierra)</td>
+<td style="text-align: left;">macOS</td>
+<td style="text-align: left;">Mac OS X 10.13 (High Sierra)</td>
 </tr>
 <tr class="odd">
-<td>Windows</td>
-<td>Windows Server 2012 R2</td>
+<td style="text-align: left;">Windows</td>
+<td style="text-align: left;">Windows Server 2012 R2</td>
 </tr>
 </tbody>
 </table>
@@ -545,27 +545,27 @@
 <table>
 <thead>
 <tr class="header">
-<th>Supported devkit targets</th>
+<th style="text-align: left;">Supported devkit targets</th>
 </tr>
 </thead>
 <tbody>
 <tr class="odd">
-<td>x86_64-linux-gnu</td>
+<td style="text-align: left;">x86_64-linux-gnu</td>
 </tr>
 <tr class="even">
-<td>aarch64-linux-gnu</td>
+<td style="text-align: left;">aarch64-linux-gnu</td>
 </tr>
 <tr class="odd">
-<td>arm-linux-gnueabihf</td>
+<td style="text-align: left;">arm-linux-gnueabihf</td>
 </tr>
 <tr class="even">
-<td>ppc64-linux-gnu</td>
+<td style="text-align: left;">ppc64-linux-gnu</td>
 </tr>
 <tr class="odd">
-<td>ppc64le-linux-gnu</td>
+<td style="text-align: left;">ppc64le-linux-gnu</td>
 </tr>
 <tr class="even">
-<td>s390x-linux-gnu</td>
+<td style="text-align: left;">s390x-linux-gnu</td>
 </tr>
 </tbody>
 </table>
@@ -679,103 +679,103 @@ ls build/linux-aarch64-server-release/</code></pre></li>
 <table>
 <thead>
 <tr class="header">
-<th>Target</th>
-<th>Debian tree</th>
-<th>Debian arch</th>
-<th><code>--openjdk-target=...</code></th>
+<th style="text-align: left;">Target</th>
+<th style="text-align: left;">Debian tree</th>
+<th style="text-align: left;">Debian arch</th>
+<th style="text-align: left;"><code>--openjdk-target=...</code></th>
 <th><code>--with-jvm-variants=...</code></th>
 </tr>
 </thead>
 <tbody>
 <tr class="odd">
-<td>x86</td>
-<td>buster</td>
-<td>i386</td>
-<td>i386-linux-gnu</td>
+<td style="text-align: left;">x86</td>
+<td style="text-align: left;">buster</td>
+<td style="text-align: left;">i386</td>
+<td style="text-align: left;">i386-linux-gnu</td>
 <td>(all)</td>
 </tr>
 <tr class="even">
-<td>arm</td>
-<td>buster</td>
-<td>armhf</td>
-<td>arm-linux-gnueabihf</td>
+<td style="text-align: left;">arm</td>
+<td style="text-align: left;">buster</td>
+<td style="text-align: left;">armhf</td>
+<td style="text-align: left;">arm-linux-gnueabihf</td>
 <td>(all)</td>
 </tr>
 <tr class="odd">
-<td>aarch64</td>
-<td>buster</td>
-<td>arm64</td>
-<td>aarch64-linux-gnu</td>
+<td style="text-align: left;">aarch64</td>
+<td style="text-align: left;">buster</td>
+<td style="text-align: left;">arm64</td>
+<td style="text-align: left;">aarch64-linux-gnu</td>
 <td>(all)</td>
 </tr>
 <tr class="even">
-<td>ppc64le</td>
-<td>buster</td>
-<td>ppc64el</td>
-<td>powerpc64le-linux-gnu</td>
+<td style="text-align: left;">ppc64le</td>
+<td style="text-align: left;">buster</td>
+<td style="text-align: left;">ppc64el</td>
+<td style="text-align: left;">powerpc64le-linux-gnu</td>
 <td>(all)</td>
 </tr>
 <tr class="odd">
-<td>s390x</td>
-<td>buster</td>
-<td>s390x</td>
-<td>s390x-linux-gnu</td>
+<td style="text-align: left;">s390x</td>
+<td style="text-align: left;">buster</td>
+<td style="text-align: left;">s390x</td>
+<td style="text-align: left;">s390x-linux-gnu</td>
 <td>(all)</td>
 </tr>
 <tr class="even">
-<td>mipsle</td>
-<td>buster</td>
-<td>mipsel</td>
-<td>mipsel-linux-gnu</td>
+<td style="text-align: left;">mipsle</td>
+<td style="text-align: left;">buster</td>
+<td style="text-align: left;">mipsel</td>
+<td style="text-align: left;">mipsel-linux-gnu</td>
 <td>zero</td>
 </tr>
 <tr class="odd">
-<td>mips64le</td>
-<td>buster</td>
-<td>mips64el</td>
-<td>mips64el-linux-gnueabi64</td>
+<td style="text-align: left;">mips64le</td>
+<td style="text-align: left;">buster</td>
+<td style="text-align: left;">mips64el</td>
+<td style="text-align: left;">mips64el-linux-gnueabi64</td>
 <td>zero</td>
 </tr>
 <tr class="even">
-<td>armel</td>
-<td>buster</td>
-<td>arm</td>
-<td>arm-linux-gnueabi</td>
+<td style="text-align: left;">armel</td>
+<td style="text-align: left;">buster</td>
+<td style="text-align: left;">arm</td>
+<td style="text-align: left;">arm-linux-gnueabi</td>
 <td>zero</td>
 </tr>
 <tr class="odd">
-<td>ppc</td>
-<td>sid</td>
-<td>powerpc</td>
-<td>powerpc-linux-gnu</td>
+<td style="text-align: left;">ppc</td>
+<td style="text-align: left;">sid</td>
+<td style="text-align: left;">powerpc</td>
+<td style="text-align: left;">powerpc-linux-gnu</td>
 <td>zero</td>
 </tr>
 <tr class="even">
-<td>ppc64be</td>
-<td>sid</td>
-<td>ppc64</td>
-<td>powerpc64-linux-gnu</td>
+<td style="text-align: left;">ppc64be</td>
+<td style="text-align: left;">sid</td>
+<td style="text-align: left;">ppc64</td>
+<td style="text-align: left;">powerpc64-linux-gnu</td>
 <td>(all)</td>
 </tr>
 <tr class="odd">
-<td>m68k</td>
-<td>sid</td>
-<td>m68k</td>
-<td>m68k-linux-gnu</td>
+<td style="text-align: left;">m68k</td>
+<td style="text-align: left;">sid</td>
+<td style="text-align: left;">m68k</td>
+<td style="text-align: left;">m68k-linux-gnu</td>
 <td>zero</td>
 </tr>
 <tr class="even">
-<td>alpha</td>
-<td>sid</td>
-<td>alpha</td>
-<td>alpha-linux-gnu</td>
+<td style="text-align: left;">alpha</td>
+<td style="text-align: left;">sid</td>
+<td style="text-align: left;">alpha</td>
+<td style="text-align: left;">alpha-linux-gnu</td>
 <td>zero</td>
 </tr>
 <tr class="odd">
-<td>sh4</td>
-<td>sid</td>
-<td>sh4</td>
-<td>sh4-linux-gnu</td>
+<td style="text-align: left;">sh4</td>
+<td style="text-align: left;">sid</td>
+<td style="text-align: left;">sh4</td>
+<td style="text-align: left;">sh4-linux-gnu</td>
 <td>zero</td>
 </tr>
 </tbody>

doc/building.md

@@ -154,11 +154,11 @@ This table lists the OS versions used by Oracle when building the JDK. Such
 information is always subject to change, but this table is up to date at the
 time of writing.
 
-| Operating system  | Vendor/version used                |
-| ----------------- | ---------------------------------- |
-| Linux             | Oracle Enterprise Linux 6.4 / 7.6  |
-| macOS             | Mac OS X 10.13 (High Sierra)       |
-| Windows           | Windows Server 2012 R2             |
+ Operating system   Vendor/version used
+ -----------------  -------------------------------------------------------
+ Linux              Oracle Enterprise Linux 6.4 / 7.6
+ macOS              Mac OS X 10.13 (High Sierra)
+ Windows            Windows Server 2012 R2
 
 The double version numbers for Linux are due to the hybrid model
 used at Oracle, where header files and external libraries from an older version
@@ -957,14 +957,14 @@ https://sourceware.org/autobook/autobook/autobook_17.html). If no
 targets are given, a native toolchain for the current platform will be
 created. Currently, at least the following targets are known to work:
 
-| Supported devkit targets |
-| ------------------------ |
-| x86_64-linux-gnu         |
-| aarch64-linux-gnu        |
-| arm-linux-gnueabihf      |
-| ppc64-linux-gnu          |
-| ppc64le-linux-gnu        |
-| s390x-linux-gnu          |
+ Supported devkit targets
+ -------------------------
+ x86_64-linux-gnu
+ aarch64-linux-gnu
+ arm-linux-gnueabihf
+ ppc64-linux-gnu
+ ppc64le-linux-gnu
+ s390x-linux-gnu
 
 `BASE_OS` must be one of "OEL6" for Oracle Enterprise Linux 6 or
 "Fedora" (if not specified "OEL6" will be the default). If the base OS
@@ -1184,21 +1184,21 @@ it might require a little nudge with:
 
 Architectures that are known to successfully cross-compile like this are:
 
-| Target       | Debian tree  | Debian arch   | `--openjdk-target=...`   | `--with-jvm-variants=...` |
-| ------------ | ------------ | ------------- | ------------------------ | ------------------------- |
-| x86          | buster       | i386          | i386-linux-gnu           | (all)                     |
-| arm          | buster       | armhf         | arm-linux-gnueabihf      | (all)                     |
-| aarch64      | buster       | arm64         | aarch64-linux-gnu        | (all)                     |
-| ppc64le      | buster       | ppc64el       | powerpc64le-linux-gnu    | (all)                     |
-| s390x        | buster       | s390x         | s390x-linux-gnu          | (all)                     |
-| mipsle       | buster       | mipsel        | mipsel-linux-gnu         | zero                      |
-| mips64le     | buster       | mips64el      | mips64el-linux-gnueabi64 | zero                      |
-| armel        | buster       | arm           | arm-linux-gnueabi        | zero                      |
-| ppc          | sid          | powerpc       | powerpc-linux-gnu        | zero                      |
-| ppc64be      | sid          | ppc64         | powerpc64-linux-gnu      | (all)                     |
-| m68k         | sid          | m68k          | m68k-linux-gnu           | zero                      |
-| alpha        | sid          | alpha         | alpha-linux-gnu          | zero                      |
-| sh4          | sid          | sh4           | sh4-linux-gnu            | zero                      |
+  Target        Debian tree  Debian arch   `--openjdk-target=...`   `--with-jvm-variants=...`
+  ------------  ------------ ------------- ------------------------ --------------
+  x86           buster       i386          i386-linux-gnu           (all)
+  arm           buster       armhf         arm-linux-gnueabihf      (all)
+  aarch64       buster       arm64         aarch64-linux-gnu        (all)
+  ppc64le       buster       ppc64el       powerpc64le-linux-gnu    (all)
+  s390x         buster       s390x         s390x-linux-gnu          (all)
+  mipsle        buster       mipsel        mipsel-linux-gnu         zero
+  mips64le      buster       mips64el      mips64el-linux-gnueabi64 zero
+  armel         buster       arm           arm-linux-gnueabi        zero
+  ppc           sid          powerpc       powerpc-linux-gnu        zero
+  ppc64be       sid          ppc64         powerpc64-linux-gnu      (all)
+  m68k          sid          m68k          m68k-linux-gnu           zero
+  alpha         sid          alpha         alpha-linux-gnu          zero
+  sh4           sid          sh4           sh4-linux-gnu            zero
 
 ### Building for ARM/aarch64
 

doc/testing.html

@@ -88,7 +88,6 @@ $ make exploded-test TEST=tier2</code></pre>
 <p>Individual JTReg tests or directories containing JTReg tests can also be specified, like <code>test/hotspot/jtreg/native_sanity/JniVersion.java</code> or <code>hotspot/jtreg/native_sanity</code>. Just like for test root selection, you can either specify an absolute path (which can even point to JTReg tests outside the source tree), or a path relative to either the JDK top directory or the <code>test</code> directory. <code>hotspot</code> can be used as an alias for <code>hotspot/jtreg</code> here as well.</p>
 <p>As long as the test groups or test paths can be uniquely resolved, you do not need to enter the <code>jtreg:</code> prefix. If this is not possible, or if you want to use a fully qualified test descriptor, add <code>jtreg:</code>, e.g. <code>jtreg:test/hotspot/jtreg/native_sanity</code>.</p>
 <h3 id="gtest">Gtest</h3>
-<p><strong>Note:</strong> To be able to run the Gtest suite, you need to configure your build to be able to find a proper version of the gtest source. For details, see the section <a href="building.html#running-tests">&quot;Running Tests&quot; in the build documentation</a>.</p>
 <p>Since the Hotspot Gtest suite is so quick, the default is to run all tests. This is specified by just <code>gtest</code>, or as a fully qualified test descriptor <code>gtest:all</code>.</p>
 <p>If you want, you can single out an individual test or a group of tests, for instance <code>gtest:LogDecorations</code> or <code>gtest:LogDecorations.level_test_vm</code>. This can be particularly useful if you want to run a shaky test repeatedly.</p>
 <p>For Gtest, there is a separate test suite for each JVM variant. The JVM variant is defined by adding <code>/&lt;variant&gt;</code> to the test descriptor, e.g. <code>gtest:Log/client</code>. If you specify no variant, gtest will run once for each JVM variant present (e.g. server, client). So if you only have the server JVM present, then <code>gtest:all</code> will be equivalent to <code>gtest:all/server</code>.</p>

doc/testing.md

@@ -142,11 +142,6 @@ use a fully qualified test descriptor, add `jtreg:`, e.g.
 
 ### Gtest
 
-**Note:** To be able to run the Gtest suite, you need to configure your build to
-be able to find a proper version of the gtest source. For details, see the
-section ["Running Tests" in the build
-documentation](building.html#running-tests).
-
 Since the Hotspot Gtest suite is so quick, the default is to run all tests.
 This is specified by just `gtest`, or as a fully qualified test descriptor
 `gtest:all`.

jb/project/tools/linux/scripts/mkimages_aarch64.sh

@@ -77,9 +77,8 @@ function create_image_bundle {
     sed 's/JBR/JBRSDK/g' "$IMAGES_DIR"/"$__root_dir"/release > release
     mv release "$IMAGES_DIR"/"$__root_dir"/release
     cp $IMAGES_DIR/jdk/lib/src.zip "$IMAGES_DIR"/"$__root_dir"/lib
+    cp $IMAGES_DIR/jdk/lib/server/*.jsa "$IMAGES_DIR"/"$__root_dir"/lib/server
     copy_jmods "$__modules" "$__modules_path" "$IMAGES_DIR"/"$__root_dir"/jmods
-    "$IMAGES_DIR"/"$__root_dir"/bin/java -Xshare:dump
-    "$IMAGES_DIR"/"$__root_dir"/bin/java -Xshare:dump -XX:-UseCompressedOops
     zip_native_debug_symbols $IMAGES_DIR/jdk "${JBR}_diz"
   fi
 

jb/project/tools/linux/scripts/mkimages_x64.sh

@@ -77,9 +77,8 @@ function create_image_bundle {
     sed 's/JBR/JBRSDK/g' "$IMAGES_DIR"/"$__root_dir"/release > release
     mv release "$IMAGES_DIR"/"$__root_dir"/release
     cp $IMAGES_DIR/jdk/lib/src.zip "$IMAGES_DIR"/"$__root_dir"/lib
+    cp $IMAGES_DIR/jdk/lib/server/*.jsa "$IMAGES_DIR"/"$__root_dir"/lib/server
     copy_jmods "$__modules" "$__modules_path" "$IMAGES_DIR"/"$__root_dir"/jmods
-    "$IMAGES_DIR"/"$__root_dir"/bin/java -Xshare:dump
-    "$IMAGES_DIR"/"$__root_dir"/bin/java -Xshare:dump -XX:-UseCompressedOops
     zip_native_debug_symbols $IMAGES_DIR/jdk "${JBR}_diz"
   fi
 

jb/project/tools/linux/scripts/mkimages_x86.sh

@@ -65,8 +65,8 @@ function create_image_bundle {
     sed 's/JBR/JBRSDK/g' "$IMAGES_DIR"/"$__root_dir"/release > release
     mv release "$IMAGES_DIR"/"$__root_dir"/release
     cp $IMAGES_DIR/jdk/lib/src.zip "$IMAGES_DIR"/"$__root_dir"/lib
+    cp $IMAGES_DIR/jdk/lib/server/*.jsa "$IMAGES_DIR"/"$__root_dir"/lib/server
     copy_jmods "$__modules" "$__modules_path" "$IMAGES_DIR"/"$__root_dir"/jmods
-    "$IMAGES_DIR"/"$__root_dir"/bin/java -Xshare:dump
     zip_native_debug_symbols $IMAGES_DIR/jdk "${JBR}_diz"
   fi
 

jb/project/tools/mac/scripts/mkimages.sh

@@ -80,9 +80,8 @@ function create_image_bundle {
     sed 's/JBR/JBRSDK/g' $JRE_CONTENTS/Home/release > release
     mv release $JRE_CONTENTS/Home/release
     cp $IMAGES_DIR/jdk-bundle/jdk-$JBSDK_VERSION.jdk/Contents/Home/lib/src.zip $JRE_CONTENTS/Home/lib
+    cp $IMAGES_DIR/jdk-bundle/jdk-$JBSDK_VERSION.jdk/Contents/Home/lib/server/*.jsa $JRE_CONTENTS/Home/lib/server
     copy_jmods "$__modules" "$__modules_path" "$JRE_CONTENTS"/Home/jmods
-    "$JRE_CONTENTS"/Home/bin/java -Xshare:dump
-    "$JRE_CONTENTS"/Home/bin/java -Xshare:dump -XX:-UseCompressedOops
     zip_native_debug_symbols $IMAGES_DIR/jdk-bundle/jdk-$JBSDK_VERSION.jdk "${JBR}_diz"
   fi
 
@@ -97,7 +96,7 @@ function create_image_bundle {
 
   echo Creating "$JBR".tar.gz ...
   # Normalize timestamp
-  find "$tmp"/"$__root_dir" -print0 | xargs -0 touch -c -h -t "$TOUCH_TIME"
+  #find "$tmp"/"$__root_dir" -print0 | xargs -0 touch -c -h -t "$TOUCH_TIME"
 
   (cd "$tmp" &&
       find "$__root_dir" -print0 | LC_ALL=C sort -z | \

jb/project/tools/windows/scripts/mkimages_aarch64.sh

@@ -75,6 +75,7 @@ function create_image_bundle {
     sed 's/JBR/JBRSDK/g' $__root_dir/release > release
     mv release $__root_dir/release
     cp $IMAGES_DIR/jdk/lib/src.zip $__root_dir/lib
+    cp $IMAGES_DIR/jdk/bin/server/*.jsa $__root_dir/bin/server
     for dir in $(ls -d $IMAGES_DIR/jdk/*); do
       rsync -amv --include="*/" --include="*.pdb" --exclude="*" $dir $__root_dir
     done

jb/project/tools/windows/scripts/mkimages_x64.sh

@@ -61,17 +61,16 @@ function create_image_bundle {
     --module-path $__modules_path --no-man-pages --compress=2 \
     --add-modules $__modules --output $__root_dir || do_exit $?
 
-  grep -v "^JAVA_VERSION" "$JSDK"/release | grep -v "^MODULES" >> $__root_dir/release
-  if [ "$__arch_name" == "$JBRSDK_BUNDLE" ]; then
+    grep -v "^JAVA_VERSION" "$JSDK"/release | grep -v "^MODULES" >> $__root_dir/release
+    if [ "$__arch_name" == "$JBRSDK_BUNDLE" ]; then
     sed 's/JBR/JBRSDK/g' $__root_dir/release > release
     mv release $__root_dir/release
     cp $IMAGES_DIR/jdk/lib/src.zip $__root_dir/lib
+    cp $IMAGES_DIR/jdk/bin/server/*.jsa $__root_dir/bin/server
     for dir in $(ls -d $IMAGES_DIR/jdk/*); do
       rsync -amv --include="*/" --include="*.pdb" --exclude="*" $dir $__root_dir
     done
     copy_jmods "$__modules" "$__modules_path" "$__root_dir"/jmods
-    "$__root_dir"/bin/java -Xshare:dump
-    "$__root_dir"/bin/java -Xshare:dump -XX:-UseCompressedOops
   fi
 }
 

jb/project/tools/windows/scripts/mkimages_x86.sh

@@ -62,11 +62,11 @@ function create_image_bundle {
     sed 's/JBR/JBRSDK/g' $__root_dir/release > release
     mv release $__root_dir/release
     cp $IMAGES_DIR/jdk/lib/src.zip $__root_dir/lib
+    cp $IMAGES_DIR/jdk/bin/server/*.jsa $__root_dir/bin/server
     for dir in $(ls -d $IMAGES_DIR/jdk/*); do
       rsync -amv --include="*/" --include="*.pdb" --exclude="*" $dir $__root_dir
     done
     copy_jmods "$__modules" "$__modules_path" "$__root_dir"/jmods
-    "$__root_dir"/bin/java -Xshare:dump
   fi
 }
 

make/RunTests.gmk

@@ -523,7 +523,7 @@ define SetupRunGtestTestBody
 	    $$(subst $$(TOPDIR)/, , $$($1_TEST_RESULTS_DIR))))
 	$$(if $$(wildcard $$($1_RESULT_FILE)), \
 	  $$(eval $1_TOTAL := $$(shell $$(AWK) '/==========.* tests? from .* \
-	      test (cases?|suites?) ran/ { print $$$$2 }' $$($1_RESULT_FILE))) \
+	      test cases? ran/ { print $$$$2 }' $$($1_RESULT_FILE))) \
 	  $$(if $$($1_TOTAL), , $$(eval $1_TOTAL := 0)) \
 	  $$(eval $1_PASSED := $$(shell $$(AWK) '/\[  PASSED  \] .* tests?./ \
 	      { print $$$$4 }' $$($1_RESULT_FILE))) \
@@ -785,10 +785,8 @@ define SetupRunJtregTestBody
   $1_JTREG_BASIC_OPTIONS += -e:JDK8_HOME=$$(BOOT_JDK)
   # If running on Windows, propagate the _NT_SYMBOL_PATH to enable
   # symbol lookup in hserr files
-  # The minidumps are disabled by default on client Windows, so enable them
   ifeq ($$(call isTargetOs, windows), true)
     $1_JTREG_BASIC_OPTIONS += -e:_NT_SYMBOL_PATH
-    $1_JTREG_BASIC_OPTIONS += -vmoption:-XX:+CreateCoredumpOnCrash
   endif
 
   $1_JTREG_BASIC_OPTIONS += \
@@ -852,12 +850,11 @@ define SetupRunJtregTestBody
     endif
   endif
 
-  clean-outputdirs-$1:
+  clean-workdir-$1:
 	$$(RM) -r $$($1_TEST_SUPPORT_DIR)
-	$$(RM) -r $$($1_TEST_RESULTS_DIR)
 
   $1_COMMAND_LINE := \
-      $$(JTREG_JAVA) $$($1_JTREG_LAUNCHER_OPTIONS) \
+      $$(JAVA) $$($1_JTREG_LAUNCHER_OPTIONS) \
           -Dprogram=jtreg -jar $$(JT_HOME)/lib/jtreg.jar \
           $$($1_JTREG_BASIC_OPTIONS) \
           -testjdk:$$(JDK_UNDER_TEST) \
@@ -899,7 +896,7 @@ define SetupRunJtregTestBody
         done
   endif
 
-  run-test-$1: pre-run-test clean-outputdirs-$1
+  run-test-$1: pre-run-test clean-workdir-$1
 	$$(call LogWarn)
 	$$(call LogWarn, Running test '$$($1_TEST)')
 	$$(call MakeDir, $$($1_TEST_RESULTS_DIR) $$($1_TEST_SUPPORT_DIR) \
@@ -936,9 +933,9 @@ define SetupRunJtregTestBody
 	  $$(eval $1_TOTAL := 1) \
 	)
 
-  $1: run-test-$1 parse-test-$1 clean-outputdirs-$1
+  $1: run-test-$1 parse-test-$1 clean-workdir-$1
 
-  TARGETS += $1 run-test-$1 parse-test-$1 clean-outputdirs-$1
+  TARGETS += $1 run-test-$1 parse-test-$1 clean-workdir-$1
   TEST_TARGETS += parse-test-$1
 
 endef

make/RunTestsPrebuilt.gmk

@@ -122,7 +122,6 @@ $(eval $(call SetupVariable,JT_HOME))
 $(eval $(call SetupVariable,JDK_IMAGE_DIR,$(OUTPUTDIR)/images/jdk))
 $(eval $(call SetupVariable,TEST_IMAGE_DIR,$(OUTPUTDIR)/images/test))
 $(eval $(call SetupVariable,SYMBOLS_IMAGE_DIR,$(OUTPUTDIR)/images/symbols,NO_CHECK))
-$(eval $(call SetupVariable,JTREG_JDK,$(BOOT_JDK)))
 
 # Provide default values for tools that we need
 $(eval $(call SetupVariable,MAKE,make,NO_CHECK))
@@ -158,10 +157,6 @@ ifeq ($(UNAME_OS), CYGWIN)
   OPENJDK_TARGET_OS := windows
   OPENJDK_TARGET_OS_TYPE := windows
   OPENJDK_TARGET_OS_ENV := windows.cygwin
-else ifeq ($(UNAME_OS), MINGW64)
-  OPENJDK_TARGET_OS := windows
-  OPENJDK_TARGET_OS_TYPE := windows
-  OPENJDK_TARGET_OS_ENV := windows.msys2
 else
   OPENJDK_TARGET_OS_TYPE:=unix
   ifeq ($(UNAME_OS), Linux)
@@ -174,9 +169,6 @@ else
   OPENJDK_TARGET_OS_ENV := $(OPENJDK_TARGET_OS)
 endif
 
-# Sanity check env detection
-$(info Detected target OS, type and env: [$(OPENJDK_TARGET_OS)] [$(OPENJDK_TARGET_OS_TYPE)] [$(OPENJDK_TARGET_OS_ENV)])
-
 # Assume little endian unless otherwise specified
 OPENJDK_TARGET_CPU_ENDIAN := little
 
@@ -256,7 +248,6 @@ $(call CreateNewSpec, $(NEW_SPEC), \
     TOPDIR := $(TOPDIR), \
     OUTPUTDIR := $(OUTPUTDIR), \
     BOOT_JDK := $(BOOT_JDK), \
-    JTREG_JDK := $(JTREG_JDK), \
     JT_HOME := $(JT_HOME), \
     JDK_IMAGE_DIR := $(JDK_IMAGE_DIR), \
     JCOV_IMAGE_DIR := $(JCOV_IMAGE_DIR), \

make/RunTestsPrebuiltSpec.gmk

@@ -124,8 +124,6 @@ JAR := $(FIXPATH) $(JAR_CMD)
 JLINK := $(FIXPATH) $(JLINK_CMD)
 JMOD := $(FIXPATH) $(JMOD_CMD)
 
-JTREG_JAVA := $(FIXPATH) $(JTREG_JDK)/bin/java $(JAVA_FLAGS_BIG) $(JAVA_FLAGS)
-
 BUILD_JAVA := $(JDK_IMAGE_DIR)/bin/JAVA
 ################################################################################
 # Some common tools. Assume most common name and no path.

make/autoconf/basic.m4

@@ -358,9 +358,9 @@ AC_DEFUN_ONCE([BASIC_SETUP_OUTPUT_DIR],
     # WARNING: This might be a bad thing to do. You need to be sure you want to
     # have a configuration in this directory. Do some sanity checks!
 
-    if test ! -e "$OUTPUTDIR/spec.gmk" && test ! -e "$OUTPUTDIR/configure-support/generated-configure.sh"; then
-      # If we have a spec.gmk or configure-support/generated-configure.sh,
-      # we have run here before and we are OK. Otherwise, check for other files
+    if test ! -e "$OUTPUTDIR/spec.gmk"; then
+      # If we have a spec.gmk, we have run here before and we are OK. Otherwise, check for
+      # other files
       files_present=`$LS $OUTPUTDIR`
       # Configure has already touched config.log and confdefs.h in the current dir when this check
       # is performed.
@@ -375,9 +375,8 @@ AC_DEFUN_ONCE([BASIC_SETUP_OUTPUT_DIR],
         AC_MSG_NOTICE([Current directory is $CONFIGURE_START_DIR.])
         AC_MSG_NOTICE([Since this is not the source root, configure will output the configuration here])
         AC_MSG_NOTICE([(as opposed to creating a configuration in <src_root>/build/<conf-name>).])
-        AC_MSG_NOTICE([However, this directory is not empty, additionally to some allowed files])
-        AC_MSG_NOTICE([it contains $filtered_files.])
-        AC_MSG_NOTICE([This is not allowed, since it could seriously mess up just about everything.])
+        AC_MSG_NOTICE([However, this directory is not empty. This is not allowed, since it could])
+        AC_MSG_NOTICE([seriously mess up just about everything.])
         AC_MSG_NOTICE([Try 'cd $TOPDIR' and restart configure])
         AC_MSG_NOTICE([(or create a new empty directory and cd to it).])
         AC_MSG_ERROR([Will not continue creating configuration in $CONFIGURE_START_DIR])

make/autoconf/configure.ac

@@ -191,15 +191,18 @@ TOOLCHAIN_POST_DETECTION
 TOOLCHAIN_SETUP_BUILD_COMPILERS
 TOOLCHAIN_MISC_CHECKS
 
+# Setup the JTReg Regression Test Harness.
+TOOLCHAIN_SETUP_JTREG
+
+# Setup the Java Microbenchmark Harness (JMH)
+LIB_TESTS_SETUP_JMH
+
+# Setup Jib dependency tool
+TOOLCHAIN_SETUP_JIB
+
 # After toolchain setup, we need to process some flags to be able to continue.
 FLAGS_POST_TOOLCHAIN
 
-# Setup the tools needed to test the JDK (JTReg Regression Test Harness,
-# Java Microbenchmark Harness (JMH) and the Jib dependency tool).
-LIB_TESTS_SETUP_JTREG
-LIB_TESTS_SETUP_JMH
-LIB_TESTS_SETUP_JIB
-
 # Now we can test some aspects on the target using configure macros.
 PLATFORM_SETUP_OPENJDK_TARGET_BITS
 PLATFORM_SETUP_OPENJDK_TARGET_ENDIANNESS
@@ -244,8 +247,7 @@ HOTSPOT_SETUP_MISC
 #
 ###############################################################################
 
-LIB_TESTS_ENABLE_DISABLE_FAILURE_HANDLER
-
+JDKOPT_ENABLE_DISABLE_FAILURE_HANDLER
 JDKOPT_ENABLE_DISABLE_GENERATE_CLASSLIST
 JDKOPT_EXCLUDE_TRANSLATIONS
 JDKOPT_ENABLE_DISABLE_MANPAGES

make/autoconf/flags-cflags.m4

@@ -171,8 +171,6 @@ AC_DEFUN([FLAGS_SETUP_WARNINGS],
       if test "x$TOOLCHAIN_VERSION" = x2017; then
         # VS2017 incorrectly triggers this warning for constexpr
         DISABLED_WARNINGS+=" 4307"
-        # VS2017 incorrectly triggers this warning for static cast (test_atomic.cpp)
-        DISABLED_WARNINGS+=" 4309"
       fi
       ;;
 

make/autoconf/jdk-options.m4

@@ -564,6 +564,29 @@ AC_DEFUN_ONCE([JDKOPT_SETUP_JLINK_OPTIONS],
   AC_SUBST(JLINK_KEEP_PACKAGED_MODULES)
 ])
 
+################################################################################
+#
+# Check if building of the jtreg failure handler should be enabled.
+#
+AC_DEFUN_ONCE([JDKOPT_ENABLE_DISABLE_FAILURE_HANDLER],
+[
+  UTIL_ARG_ENABLE(NAME: jtreg-failure-handler, DEFAULT: auto,
+      RESULT: BUILD_FAILURE_HANDLER,
+      DESC: [enable building of the jtreg failure handler],
+      DEFAULT_DESC: [enabled if jtreg is present],
+      CHECKING_MSG: [if the jtreg failure handler should be built],
+      CHECK_AVAILABLE: [
+        AC_MSG_CHECKING([if the jtreg failure handler is available])
+        if test "x$JT_HOME" != "x"; then
+          AC_MSG_RESULT([yes])
+        else
+          AVAILABLE=false
+          AC_MSG_RESULT([no (jtreg not present)])
+        fi
+      ])
+  AC_SUBST(BUILD_FAILURE_HANDLER)
+])
+
 ################################################################################
 #
 # Enable or disable generation of the classlist at build time
@@ -789,9 +812,6 @@ AC_DEFUN([JDKOPT_CHECK_CODESIGN_PARAMS],
   $RM "$CODESIGN_TESTFILE"
   $TOUCH "$CODESIGN_TESTFILE"
   CODESIGN_SUCCESS=false
-
-  $ECHO "check codesign, calling $CODESIGN $PARAMS $CODESIGN_TESTFILE" >&AS_MESSAGE_LOG_FD
-
   eval \"$CODESIGN\" $PARAMS \"$CODESIGN_TESTFILE\" 2>&AS_MESSAGE_LOG_FD \
       >&AS_MESSAGE_LOG_FD && CODESIGN_SUCCESS=true
   $RM "$CODESIGN_TESTFILE"

make/autoconf/lib-tests.m4

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2018, 2022, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2018, 2020, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -23,13 +23,6 @@
 # questions.
 #
 
-################################################################################
-# Setup libraries and functionalities needed to test the JDK.
-################################################################################
-
-# Minimum supported version
-JTREG_MINIMUM_VERSION=7.3.1
-
 ###############################################################################
 #
 # Setup and check for gtest framework source files
@@ -54,25 +47,9 @@ AC_DEFUN_ONCE([LIB_TESTS_SETUP_GTEST],
         AC_MSG_RESULT([no])
         AC_MSG_ERROR([Can't find 'googlemock/include/gmock/gmock.h' under ${with_gtest} given with the --with-gtest option.])
       else
-        GTEST_FRAMEWORK_SRC=$with_gtest
+        GTEST_FRAMEWORK_SRC=${with_gtest}
         AC_MSG_RESULT([$GTEST_FRAMEWORK_SRC])
         UTIL_FIXUP_PATH([GTEST_FRAMEWORK_SRC])
-
-        # Try to verify version. We require 1.8.1, but this can not be directly
-        # determined. :-( Instead, there are different, incorrect version
-        # numbers we can look for.
-        GTEST_VERSION_1="`$GREP GOOGLETEST_VERSION $GTEST_FRAMEWORK_SRC/CMakeLists.txt | $SED -E -e 's/set\(GOOGLETEST_VERSION (.*)\)/\1/'`"
-        if test "x$GTEST_VERSION_1" != "x1.9.0"; then
-          AC_MSG_ERROR([gtest at $GTEST_FRAMEWORK_SRC does not seem to be version 1.8.1])
-        fi
-
-        # We cannot grep for "AC_IN*T" as a literal since then m4 will treat it as a macro
-        # and expand it.
-        # Additional [] needed to keep m4 from mangling shell constructs.
-        [ GTEST_VERSION_2="`$GREP -A1 ^.C_INIT $GTEST_FRAMEWORK_SRC/configure.ac | $TAIL -n 1 | $SED -E -e 's/ +\[(.*)],/\1/'`" ]
-        if test "x$GTEST_VERSION_2" != "x1.8.0"; then
-          AC_MSG_ERROR([gtest at $GTEST_FRAMEWORK_SRC does not seem to be version 1.8.1 B])
-        fi
       fi
     fi
   fi
@@ -141,198 +118,3 @@ AC_DEFUN_ONCE([LIB_TESTS_SETUP_JMH],
   AC_SUBST(JMH_COMMONS_MATH_JAR)
   AC_SUBST(JMH_VERSION)
 ])
-
-# Setup the JTReg Regression Test Harness.
-AC_DEFUN_ONCE([LIB_TESTS_SETUP_JTREG],
-[
-  AC_ARG_WITH(jtreg, [AS_HELP_STRING([--with-jtreg],
-      [Regression Test Harness @<:@probed@:>@])])
-
-  if test "x$with_jtreg" = xno; then
-    # jtreg disabled
-    AC_MSG_CHECKING([for jtreg test harness])
-    AC_MSG_RESULT([no, disabled])
-  elif test "x$with_jtreg" != xyes && test "x$with_jtreg" != x; then
-    if test -d "$with_jtreg"; then
-      # An explicit path is specified, use it.
-      JT_HOME="$with_jtreg"
-    else
-      case "$with_jtreg" in
-        *.zip )
-          JTREG_SUPPORT_DIR=$CONFIGURESUPPORT_OUTPUTDIR/jtreg
-          $RM -rf $JTREG_SUPPORT_DIR
-          $MKDIR -p $JTREG_SUPPORT_DIR
-          $UNZIP -qq -d $JTREG_SUPPORT_DIR $with_jtreg
-
-          # Try to find jtreg to determine JT_HOME path
-          JTREG_PATH=`$FIND $JTREG_SUPPORT_DIR | $GREP "/bin/jtreg"`
-          if test "x$JTREG_PATH" != x; then
-            JT_HOME=$($DIRNAME $($DIRNAME $JTREG_PATH))
-          fi
-          ;;
-        * )
-          ;;
-      esac
-    fi
-    UTIL_FIXUP_PATH([JT_HOME])
-    if test ! -d "$JT_HOME"; then
-      AC_MSG_ERROR([jtreg home directory from --with-jtreg=$with_jtreg does not exist])
-    fi
-
-    if test ! -e "$JT_HOME/lib/jtreg.jar"; then
-      AC_MSG_ERROR([jtreg home directory from --with-jtreg=$with_jtreg is not a valid jtreg home])
-    fi
-
-    AC_MSG_CHECKING([for jtreg test harness])
-    AC_MSG_RESULT([$JT_HOME])
-  else
-    # Try to locate jtreg using the JT_HOME environment variable
-    if test "x$JT_HOME" != x; then
-      # JT_HOME set in environment, use it
-      if test ! -d "$JT_HOME"; then
-        AC_MSG_WARN([Ignoring JT_HOME pointing to invalid directory: $JT_HOME])
-        JT_HOME=
-      else
-        if test ! -e "$JT_HOME/lib/jtreg.jar"; then
-          AC_MSG_WARN([Ignoring JT_HOME which is not a valid jtreg home: $JT_HOME])
-          JT_HOME=
-        else
-          AC_MSG_NOTICE([Located jtreg using JT_HOME from environment])
-        fi
-      fi
-    fi
-
-    if test "x$JT_HOME" = x; then
-      # JT_HOME is not set in environment, or was deemed invalid.
-      # Try to find jtreg on path
-      UTIL_LOOKUP_PROGS(JTREGEXE, jtreg)
-      if test "x$JTREGEXE" != x; then
-        # That's good, now try to derive JT_HOME
-        JT_HOME=`(cd $($DIRNAME $JTREGEXE)/.. && pwd)`
-        if test ! -e "$JT_HOME/lib/jtreg.jar"; then
-          AC_MSG_WARN([Ignoring jtreg from path since a valid jtreg home cannot be found])
-          JT_HOME=
-        else
-          AC_MSG_NOTICE([Located jtreg using jtreg executable in path])
-        fi
-      fi
-    fi
-
-    AC_MSG_CHECKING([for jtreg test harness])
-    if test "x$JT_HOME" != x; then
-      AC_MSG_RESULT([$JT_HOME])
-    else
-      AC_MSG_RESULT([no, not found])
-
-      if test "x$with_jtreg" = xyes; then
-        AC_MSG_ERROR([--with-jtreg was specified, but no jtreg found.])
-      fi
-    fi
-  fi
-
-  UTIL_FIXUP_PATH(JT_HOME)
-  AC_SUBST(JT_HOME)
-
-  # Specify a JDK for running jtreg. Defaults to the BOOT_JDK.
-  AC_ARG_WITH(jtreg-jdk, [AS_HELP_STRING([--with-jdk],
-    [path to JDK for running jtreg @<:@BOOT_JDK@:>@])])
-
-  AC_MSG_CHECKING([for jtreg jdk])
-  if test "x${with_jtreg_jdk}" != x; then
-    if test "x${with_jtreg_jdk}" = xno; then
-      AC_MSG_RESULT([no, jtreg jdk not specified])
-    elif test "x${with_jtreg_jdk}" = xyes; then
-      AC_MSG_RESULT([not specified])
-      AC_MSG_ERROR([--with-jtreg-jdk needs a value])
-    else
-      JTREG_JDK="${with_jtreg_jdk}"
-      AC_MSG_RESULT([$JTREG_JDK])
-      UTIL_FIXUP_PATH(JTREG_JDK)
-      if test ! -f "$JTREG_JDK/bin/java"; then
-        AC_MSG_ERROR([Could not find jtreg java at $JTREG_JDK/bin/java])
-      fi
-    fi
-  else
-    JTREG_JDK="${BOOT_JDK}"
-    AC_MSG_RESULT([no, using BOOT_JDK])
-  fi
-
-  UTIL_FIXUP_PATH(JTREG_JDK)
-  AC_SUBST([JTREG_JDK])
-  # For use in the configure script
-  JTREG_JAVA="$FIXPATH $JTREG_JDK/bin/java"
-
-  # Verify jtreg version
-  if test "x$JT_HOME" != x; then
-    AC_MSG_CHECKING([jtreg jar existence])
-    if test ! -f "$JT_HOME/lib/jtreg.jar"; then
-      AC_MSG_ERROR([Could not find jtreg jar at $JT_HOME/lib/jtreg.jar])
-    fi
-
-    AC_MSG_CHECKING([jtreg version number])
-    # jtreg -version looks like this: "jtreg 6.1+1-19"
-    # Extract actual version part ("6.1" in this case)
-    jtreg_version_full=$($JTREG_JAVA -jar $JT_HOME/lib/jtreg.jar -version | $HEAD -n 1 | $CUT -d ' ' -f 2)
-
-    jtreg_version=${jtreg_version_full/%+*}
-    AC_MSG_RESULT([$jtreg_version])
-
-    # This is a simplified version of TOOLCHAIN_CHECK_COMPILER_VERSION
-    comparable_actual_version=`$AWK -F. '{ printf("%05d%05d%05d%05d\n", [$]1, [$]2, [$]3, [$]4) }' <<< "$jtreg_version"`
-    comparable_minimum_version=`$AWK -F. '{ printf("%05d%05d%05d%05d\n", [$]1, [$]2, [$]3, [$]4) }' <<< "$JTREG_MINIMUM_VERSION"`
-    if test $comparable_actual_version -lt $comparable_minimum_version ; then
-      AC_MSG_ERROR([jtreg version is too old, at least version $JTREG_MINIMUM_VERSION is required])
-    fi
-  fi
-])
-
-# Setup the JIB dependency resolver
-AC_DEFUN_ONCE([LIB_TESTS_SETUP_JIB],
-[
-  AC_ARG_WITH(jib, [AS_HELP_STRING([--with-jib],
-      [Jib dependency management tool @<:@not used@:>@])])
-
-  if test "x$with_jib" = xno || test "x$with_jib" = x; then
-    # jib disabled
-    AC_MSG_CHECKING([for jib])
-    AC_MSG_RESULT(no)
-  elif test "x$with_jib" = xyes; then
-    AC_MSG_ERROR([Must supply a value to --with-jib])
-  else
-    JIB_HOME="${with_jib}"
-    AC_MSG_CHECKING([for jib])
-    AC_MSG_RESULT(${JIB_HOME})
-    if test ! -d "${JIB_HOME}"; then
-      AC_MSG_ERROR([--with-jib must be a directory])
-    fi
-    JIB_JAR=$(ls ${JIB_HOME}/lib/jib-*.jar)
-    if test ! -f "${JIB_JAR}"; then
-      AC_MSG_ERROR([Could not find jib jar file in ${JIB_HOME}])
-    fi
-  fi
-
-  AC_SUBST(JIB_HOME)
-])
-
-################################################################################
-#
-# Check if building of the jtreg failure handler should be enabled.
-#
-AC_DEFUN_ONCE([LIB_TESTS_ENABLE_DISABLE_FAILURE_HANDLER],
-[
-  UTIL_ARG_ENABLE(NAME: jtreg-failure-handler, DEFAULT: auto,
-      RESULT: BUILD_FAILURE_HANDLER,
-      DESC: [enable building of the jtreg failure handler],
-      DEFAULT_DESC: [enabled if jtreg is present],
-      CHECKING_MSG: [if the jtreg failure handler should be built],
-      CHECK_AVAILABLE: [
-        AC_MSG_CHECKING([if the jtreg failure handler is available])
-        if test "x$JT_HOME" != "x"; then
-          AC_MSG_RESULT([yes])
-        else
-          AVAILABLE=false
-          AC_MSG_RESULT([no (jtreg not present)])
-        fi
-      ])
-  AC_SUBST(BUILD_FAILURE_HANDLER)
-])

make/autoconf/lib-x11.m4

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2011, 2023, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2011, 2022, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -35,7 +35,6 @@ AC_DEFUN_ONCE([LIB_SETUP_X11],
     X_CFLAGS=
     X_LIBS=
   else
-    x_libraries_orig="$x_libraries"
 
     if test "x${with_x}" = xno; then
       AC_MSG_ERROR([It is not possible to disable the use of X11. Remove the --without-x option.])
@@ -49,7 +48,6 @@ AC_DEFUN_ONCE([LIB_SETUP_X11],
       fi
       if test "x$x_libraries" = xNONE; then
         x_libraries="${with_x}/lib"
-        x_libraries_orig="$x_libraries"
       fi
     else
       # Check if the user has specified sysroot, but not --with-x, --x-includes or --x-libraries.
@@ -84,8 +82,8 @@ AC_DEFUN_ONCE([LIB_SETUP_X11],
     AC_PATH_XTRA
 
     # AC_PATH_XTRA creates X_LIBS and sometimes adds -R flags. When cross compiling
-    # this doesn't make sense so we remove it; same for sysroot (devkit).
-    if test "x$COMPILE_TYPE" = xcross || (test "x$SYSROOT" != "x" && test "x$x_libraries_orig" = xNONE); then
+    # this doesn't make sense so we remove it.
+    if test "x$COMPILE_TYPE" = xcross; then
       X_LIBS=`$ECHO $X_LIBS | $SED 's/-R \{0,1\}[[^ ]]*//g'`
     fi
 

make/autoconf/libraries.m4

@@ -160,6 +160,12 @@ AC_DEFUN_ONCE([LIB_SETUP_LIBRARIES],
     fi
   fi
 
+  # Because RISC-V only has word-sized atomics, it requries libatomic where
+  # other common architectures do not.  So link libatomic by default.
+  if test "x$OPENJDK_TARGET_OS" = xlinux && test "x$OPENJDK_TARGET_CPU" = xriscv64; then
+    BASIC_JVM_LIBS="$BASIC_JVM_LIBS -latomic"
+  fi
+
   # perfstat lib
   if test "x$OPENJDK_TARGET_OS" = xaix; then
     BASIC_JVM_LIBS="$BASIC_JVM_LIBS -lperfstat"

make/autoconf/platform.m4

@@ -573,8 +573,6 @@ AC_DEFUN([PLATFORM_SETUP_LEGACY_VARS_HELPER],
     HOTSPOT_$1_CPU_DEFINE=S390
   elif test "x$OPENJDK_$1_CPU" = xs390x; then
     HOTSPOT_$1_CPU_DEFINE=S390
-  elif test "x$OPENJDK_$1_CPU" = xloongarch64; then
-    HOTSPOT_$1_CPU_DEFINE=LOONGARCH64
   elif test "x$OPENJDK_$1_CPU" != x; then
     HOTSPOT_$1_CPU_DEFINE=$(echo $OPENJDK_$1_CPU | tr a-z A-Z)
   fi

make/autoconf/spec.gmk.in

@@ -676,9 +676,6 @@ JAR = $(JAR_CMD)
 JLINK = $(JLINK_CMD)
 JMOD = $(JMOD_CMD) $(JAVA_TOOL_FLAGS_SMALL)
 
-JTREG_JDK := @JTREG_JDK@
-JTREG_JAVA = @FIXPATH@ $(JTREG_JDK)/bin/java $(JAVA_FLAGS_BIG) $(JAVA_FLAGS)
-
 BUILD_JAVA_FLAGS := @BOOTCYCLE_JVM_ARGS_BIG@
 BUILD_JAVA=@FIXPATH@ $(BUILD_JDK)/bin/java $(BUILD_JAVA_FLAGS)
 BUILD_JAVAC=@FIXPATH@ $(BUILD_JDK)/bin/javac

make/autoconf/toolchain.m4

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2011, 2024, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2011, 2022, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -58,6 +58,9 @@ TOOLCHAIN_MINIMUM_VERSION_xlc=""
 # Minimum supported linker versions, empty means unspecified
 TOOLCHAIN_MINIMUM_LD_VERSION_gcc="2.18"
 
+# Minimum supported version
+JTREG_MINIMUM_VERSION=6.1
+
 # Prepare the system so that TOOLCHAIN_CHECK_COMPILER_VERSION can be called.
 # Must have CC_VERSION_NUMBER and CXX_VERSION_NUMBER.
 # $1 - optional variable prefix for compiler and version variables (BUILD_)
@@ -369,10 +372,6 @@ AC_DEFUN_ONCE([TOOLCHAIN_POST_DETECTION],
   # This is necessary since AC_PROG_CC defaults CFLAGS to "-g -O2"
   CFLAGS="$ORG_CFLAGS"
   CXXFLAGS="$ORG_CXXFLAGS"
-
-  # filter out some unwanted additions autoconf may add to CXX; we saw this on macOS with autoconf 2.72
-  UTIL_GET_NON_MATCHING_VALUES(cxx_filtered, $CXX, -std=c++11 -std=gnu++11)
-  CXX="$cxx_filtered"
 ])
 
 # Check if a compiler is of the toolchain type we expect, and save the version
@@ -995,3 +994,140 @@ AC_DEFUN_ONCE([TOOLCHAIN_MISC_CHECKS],
   fi
   AC_SUBST(HOTSPOT_TOOLCHAIN_TYPE)
 ])
+
+# Setup the JTReg Regression Test Harness.
+AC_DEFUN_ONCE([TOOLCHAIN_SETUP_JTREG],
+[
+  AC_ARG_WITH(jtreg, [AS_HELP_STRING([--with-jtreg],
+      [Regression Test Harness @<:@probed@:>@])])
+
+  if test "x$with_jtreg" = xno; then
+    # jtreg disabled
+    AC_MSG_CHECKING([for jtreg test harness])
+    AC_MSG_RESULT([no, disabled])
+  elif test "x$with_jtreg" != xyes && test "x$with_jtreg" != x; then
+    if test -d "$with_jtreg"; then
+      # An explicit path is specified, use it.
+      JT_HOME="$with_jtreg"
+    else
+      case "$with_jtreg" in
+        *.zip )
+          JTREG_SUPPORT_DIR=$CONFIGURESUPPORT_OUTPUTDIR/jtreg
+          $RM -rf $JTREG_SUPPORT_DIR
+          $MKDIR -p $JTREG_SUPPORT_DIR
+          $UNZIP -qq -d $JTREG_SUPPORT_DIR $with_jtreg
+
+          # Try to find jtreg to determine JT_HOME path
+          JTREG_PATH=`$FIND $JTREG_SUPPORT_DIR | $GREP "/bin/jtreg"`
+          if test "x$JTREG_PATH" != x; then
+            JT_HOME=$($DIRNAME $($DIRNAME $JTREG_PATH))
+          fi
+          ;;
+        * )
+          ;;
+      esac
+    fi
+    UTIL_FIXUP_PATH([JT_HOME])
+    if test ! -d "$JT_HOME"; then
+      AC_MSG_ERROR([jtreg home directory from --with-jtreg=$with_jtreg does not exist])
+    fi
+
+    if test ! -e "$JT_HOME/lib/jtreg.jar"; then
+      AC_MSG_ERROR([jtreg home directory from --with-jtreg=$with_jtreg is not a valid jtreg home])
+    fi
+
+    AC_MSG_CHECKING([for jtreg test harness])
+    AC_MSG_RESULT([$JT_HOME])
+  else
+    # Try to locate jtreg using the JT_HOME environment variable
+    if test "x$JT_HOME" != x; then
+      # JT_HOME set in environment, use it
+      if test ! -d "$JT_HOME"; then
+        AC_MSG_WARN([Ignoring JT_HOME pointing to invalid directory: $JT_HOME])
+        JT_HOME=
+      else
+        if test ! -e "$JT_HOME/lib/jtreg.jar"; then
+          AC_MSG_WARN([Ignoring JT_HOME which is not a valid jtreg home: $JT_HOME])
+          JT_HOME=
+        else
+          AC_MSG_NOTICE([Located jtreg using JT_HOME from environment])
+        fi
+      fi
+    fi
+
+    if test "x$JT_HOME" = x; then
+      # JT_HOME is not set in environment, or was deemed invalid.
+      # Try to find jtreg on path
+      UTIL_LOOKUP_PROGS(JTREGEXE, jtreg)
+      if test "x$JTREGEXE" != x; then
+        # That's good, now try to derive JT_HOME
+        JT_HOME=`(cd $($DIRNAME $JTREGEXE)/.. && pwd)`
+        if test ! -e "$JT_HOME/lib/jtreg.jar"; then
+          AC_MSG_WARN([Ignoring jtreg from path since a valid jtreg home cannot be found])
+          JT_HOME=
+        else
+          AC_MSG_NOTICE([Located jtreg using jtreg executable in path])
+        fi
+      fi
+    fi
+
+    AC_MSG_CHECKING([for jtreg test harness])
+    if test "x$JT_HOME" != x; then
+      AC_MSG_RESULT([$JT_HOME])
+    else
+      AC_MSG_RESULT([no, not found])
+
+      if test "x$with_jtreg" = xyes; then
+        AC_MSG_ERROR([--with-jtreg was specified, but no jtreg found.])
+      fi
+    fi
+  fi
+
+  UTIL_FIXUP_PATH(JT_HOME)
+  AC_SUBST(JT_HOME)
+
+  # Verify jtreg version
+  if test "x$JT_HOME" != x; then
+    AC_MSG_CHECKING([jtreg version number])
+    # jtreg -version looks like this: "jtreg 6.1+1-19"
+    # Extract actual version part ("6.1" in this case)
+    jtreg_version_full=`$JAVA -jar $JT_HOME/lib/jtreg.jar -version | $HEAD -n 1 | $CUT -d ' ' -f 2`
+    jtreg_version=${jtreg_version_full/%+*}
+    AC_MSG_RESULT([$jtreg_version])
+
+    # This is a simplified version of TOOLCHAIN_CHECK_COMPILER_VERSION
+    comparable_actual_version=`$AWK -F. '{ printf("%05d%05d%05d%05d\n", [$]1, [$]2, [$]3, [$]4) }' <<< "$jtreg_version"`
+    comparable_minimum_version=`$AWK -F. '{ printf("%05d%05d%05d%05d\n", [$]1, [$]2, [$]3, [$]4) }' <<< "$JTREG_MINIMUM_VERSION"`
+    if test $comparable_actual_version -lt $comparable_minimum_version ; then
+      AC_MSG_ERROR([jtreg version is too old, at least version $JTREG_MINIMUM_VERSION is required])
+    fi
+  fi
+])
+
+# Setup the JIB dependency resolver
+AC_DEFUN_ONCE([TOOLCHAIN_SETUP_JIB],
+[
+  AC_ARG_WITH(jib, [AS_HELP_STRING([--with-jib],
+      [Jib dependency management tool @<:@not used@:>@])])
+
+  if test "x$with_jib" = xno || test "x$with_jib" = x; then
+    # jib disabled
+    AC_MSG_CHECKING([for jib])
+    AC_MSG_RESULT(no)
+  elif test "x$with_jib" = xyes; then
+    AC_MSG_ERROR([Must supply a value to --with-jib])
+  else
+    JIB_HOME="${with_jib}"
+    AC_MSG_CHECKING([for jib])
+    AC_MSG_RESULT(${JIB_HOME})
+    if test ! -d "${JIB_HOME}"; then
+      AC_MSG_ERROR([--with-jib must be a directory])
+    fi
+    JIB_JAR=$(ls ${JIB_HOME}/lib/jib-*.jar)
+    if test ! -f "${JIB_JAR}"; then
+      AC_MSG_ERROR([Could not find jib jar file in ${JIB_HOME}])
+    fi
+  fi
+
+  AC_SUBST(JIB_HOME)
+])

make/autoconf/util.m4

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2011, 2024, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2011, 2022, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -199,7 +199,7 @@ AC_DEFUN([UTIL_GET_NON_MATCHING_VALUES],
   if test -z "$legal_values"; then
     $1="$2"
   else
-    result=`$GREP -Fvx -- "$legal_values" <<< "$values_to_check" | $GREP -v '^$'`
+    result=`$GREP -Fvx "$legal_values" <<< "$values_to_check" | $GREP -v '^$'`
     $1=${result//$'\n'/ }
   fi
 ])
@@ -226,7 +226,7 @@ AC_DEFUN([UTIL_GET_MATCHING_VALUES],
   if test -z "$illegal_values"; then
     $1=""
   else
-    result=`$GREP -Fx -- "$illegal_values" <<< "$values_to_check" | $GREP -v '^$'`
+    result=`$GREP -Fx "$illegal_values" <<< "$values_to_check" | $GREP -v '^$'`
     $1=${result//$'\n'/ }
   fi
 ])

make/conf/github-actions.conf

@@ -26,7 +26,7 @@
 # Versions and download locations for dependencies used by GitHub Actions (GHA)
 
 GTEST_VERSION=1.8.1
-JTREG_VERSION=7.3.1+1
+JTREG_VERSION=6.1+3
 
 LINUX_X64_BOOT_JDK_EXT=tar.gz
 LINUX_X64_BOOT_JDK_URL=https://github.com/adoptium/temurin17-binaries/releases/download/jdk-17.0.6%2B10/OpenJDK17U-jdk_x64_linux_hotspot_17.0.6_10.tar.gz

make/conf/jib-profiles.js

@@ -917,7 +917,10 @@ var getJibProfilesProfiles = function (input, common, data) {
             target_os: input.build_os,
             target_cpu: input.build_cpu,
             dependencies: [ "jtreg", "gnumake", "boot_jdk", "devkit", "jib" ],
-            labels: "test"
+            labels: "test",
+            environment: {
+                "JT_JAVA": common.boot_jdk_home
+            }
         }
     };
     profiles = concatObjects(profiles, testOnlyProfiles);
@@ -1153,9 +1156,9 @@ var getJibProfilesDependencies = function (input, common) {
         jtreg: {
             server: "jpg",
             product: "jtreg",
-            version: "7.3.1",
+            version: "6",
             build_number: "1",
-            file: "bundles/jtreg-7.3.1+1.zip",
+            file: "bundles/jtreg-6+1.zip",
             environment_name: "JT_HOME",
             environment_path: input.get("jtreg", "home_path") + "/bin",
             configure_args: "--with-jtreg=" + input.get("jtreg", "home_path"),

make/conf/version-numbers.conf

@@ -28,12 +28,12 @@
 
 DEFAULT_VERSION_FEATURE=17
 DEFAULT_VERSION_INTERIM=0
-DEFAULT_VERSION_UPDATE=11
+DEFAULT_VERSION_UPDATE=9
 DEFAULT_VERSION_PATCH=0
 DEFAULT_VERSION_EXTRA1=0
 DEFAULT_VERSION_EXTRA2=0
 DEFAULT_VERSION_EXTRA3=0
-DEFAULT_VERSION_DATE=2024-04-16
+DEFAULT_VERSION_DATE=2023-10-17
 DEFAULT_VERSION_CLASSFILE_MAJOR=61  # "`$EXPR $DEFAULT_VERSION_FEATURE + 44`"
 DEFAULT_VERSION_CLASSFILE_MINOR=0
 DEFAULT_VERSION_DOCS_API_SINCE=11

make/data/cacerts/certainlyroote1

@@ -1,20 +0,0 @@
-Owner: CN=Certainly Root E1, O=Certainly, C=US
-Issuer: CN=Certainly Root E1, O=Certainly, C=US
-Serial number: 62533b1470333275cf98d9ab9bfccf8
-Valid from: Thu Apr 01 00:00:00 GMT 2021 until: Sun Apr 01 00:00:00 GMT 2046
-Signature algorithm name: SHA384withECDSA
-Subject Public Key Algorithm: 384-bit EC (secp384r1) key
-Version: 3
------BEGIN CERTIFICATE-----
-MIIB9zCCAX2gAwIBAgIQBiUzsUcDMydc+Y2aub/M+DAKBggqhkjOPQQDAzA9MQsw
-CQYDVQQGEwJVUzESMBAGA1UEChMJQ2VydGFpbmx5MRowGAYDVQQDExFDZXJ0YWlu
-bHkgUm9vdCBFMTAeFw0yMTA0MDEwMDAwMDBaFw00NjA0MDEwMDAwMDBaMD0xCzAJ
-BgNVBAYTAlVTMRIwEAYDVQQKEwlDZXJ0YWlubHkxGjAYBgNVBAMTEUNlcnRhaW5s
-eSBSb290IEUxMHYwEAYHKoZIzj0CAQYFK4EEACIDYgAE3m/4fxzf7flHh4axpMCK
-+IKXgOqPyEpeKn2IaKcBYhSRJHpcnqMXfYqGITQYUBsQ3tA3SybHGWCA6TS9YBk2
-QNYphwk8kXr2vBMj3VlOBF7PyAIcGFPBMdjaIOlEjeR2o0IwQDAOBgNVHQ8BAf8E
-BAMCAQYwDwYDVR0TAQH/BAUwAwEB/zAdBgNVHQ4EFgQU8ygYy2R17ikq6+2uI1g4
-hevIIgcwCgYIKoZIzj0EAwMDaAAwZQIxALGOWiDDshliTd6wT99u0nCK8Z9+aozm
-ut6Dacpps6kFtZaSF4fC0urQe87YQVt8rgIwRt7qy12a7DLCZRawTDBcMPPaTnOG
-BtjOiQRINzf43TNRnXCve1XYAS59BWQOhriR
------END CERTIFICATE-----

make/data/cacerts/certainlyrootr1

@@ -1,38 +0,0 @@
-Owner: CN=Certainly Root R1, O=Certainly, C=US
-Issuer: CN=Certainly Root R1, O=Certainly, C=US
-Serial number: 8e0ff94b907168653354f4d44439b7e0
-Valid from: Thu Apr 01 00:00:00 GMT 2021 until: Sun Apr 01 00:00:00 GMT 2046
-Signature algorithm name: SHA256withRSA
-Subject Public Key Algorithm: 4096-bit RSA key
-Version: 3
------BEGIN CERTIFICATE-----
-MIIFRzCCAy+gAwIBAgIRAI4P+UuQcWhlM1T01EQ5t+AwDQYJKoZIhvcNAQELBQAw
-PTELMAkGA1UEBhMCVVMxEjAQBgNVBAoTCUNlcnRhaW5seTEaMBgGA1UEAxMRQ2Vy
-dGFpbmx5IFJvb3QgUjEwHhcNMjEwNDAxMDAwMDAwWhcNNDYwNDAxMDAwMDAwWjA9
-MQswCQYDVQQGEwJVUzESMBAGA1UEChMJQ2VydGFpbmx5MRowGAYDVQQDExFDZXJ0
-YWlubHkgUm9vdCBSMTCCAiIwDQYJKoZIhvcNAQEBBQADggIPADCCAgoCggIBANA2
-1B/q3avk0bbm+yLA3RMNansiExyXPGhjZjKcA7WNpIGD2ngwEc/csiu+kr+O5MQT
-vqRoTNoCaBZ0vrLdBORrKt03H2As2/X3oXyVtwxwhi7xOu9S98zTm/mLvg7fMbed
-aFySpvXl8wo0tf97ouSHocavFwDvA5HtqRxOcT3Si2yJ9HiG5mpJoM610rCrm/b0
-1C7jcvk2xusVtyWMOvwlDbMicyF0yEqWYZL1LwsYpfSt4u5BvQF5+paMjRcCMLT5
-r3gajLQ2EBAHBXDQ9DGQilHFhiZ5shGIXsXwClTNSaa/ApzSRKft43jvRl5tcdF5
-cBxGX1HpyTfcX35pe0HfNEXgO4T0oYoKNp43zGJS4YkNKPl6I7ENPT2a/Z2B7yyQ
-wHtETrtJ4A5KVpK8y7XdeReJkd5hiXSSqOMyhb5OhaRLWcsrxXiOcVTQAjeZjOVJ
-6uBUcqQRBi8LjMFbvrWhsFNunLhgkR9Za/kt9JQKl7XsxXYDVBtlUrpMklZRNaBA
-2CnbrlJ2Oy0wQJuK0EJWtLeIAaSHO1OWzaMWj/Nmqhexx2DgwUMFDO6bW2BvBlyH
-Wyf5QBGenDPBt+U1VwV/J84XIIwc/PH72jEpSe31C4SnT8H2TsIonPru4K8H+zMR
-eiFPCyEQtkA6qyI6BJyLm4SGcprSp6XEtHWRqSsjAgMBAAGjQjBAMA4GA1UdDwEB
-/wQEAwIBBjAPBgNVHRMBAf8EBTADAQH/MB0GA1UdDgQWBBTgqj8ljZ9EXME66C6u
-d0yEPmcM9DANBgkqhkiG9w0BAQsFAAOCAgEAuVevuBLaV4OPaAszHQNTVfSVcOQr
-PbA56/qJYv331hgELyE03fFo8NWWWt7CgKPBjcZq91l3rhVkz1t5BXdm6ozTaw3d
-8VkswTOlMIAVRQdFGjEitpIAq5lNOo93r6kiyi9jyhXWx8bwPWz8HA2YEGGeEaIi
-1wrykXprOQ4vMMM2SZ/g6Q8CRFA3lFV96p/2O7qUpUzpvD5RtOjKkjZUbVwlKNrd
-rRT90+7iIgXr0PK3aBLXWopBGsaSpVo7Y0VPv+E6dyIvXL9G+VoDhRNCX8reU9di
-taY1BMJH/5n9hN9czulegChB8n3nHpDYT3Y+gjwN/KUD+nsa2UUeYNrEjvn8K8l7
-lcUq/6qJ34IxD3L/DCfXCh5WAFAeDJDBlrXYFIW7pw0WwfgHJBu6haEaBQmAupVj
-yTrsJZ9/nbqkRxWbRHDxakvWOF5D8xh+UG7pWijmZeZ3Gzr9Hb4DJqPb1OG7fpYn
-Kx3upPvaJVQTA945xsMfTZDsjxtK0hzthZU4UHlG1sGQUDGpXJpuHfUzVounmdLy
-yCwzk5Iwx06MZTMQZBf9JBeW0Y3COmor6xOLRPIh80oat3df1+2IpHLlOR+Vnb5n
-wXARPbv0+Em34yaXOp/SX3z7wJl8OSngex2/DaeP0ik0biQVy96QXr8axGbqwua6
-OV+KmalBWQewLK8=
------END CERTIFICATE-----

make/data/cacerts/digicertcseccrootg5

@@ -1,21 +0,0 @@
-Owner: CN=DigiCert CS ECC P384 Root G5, O="DigiCert, Inc.", C=US
-Issuer: CN=DigiCert CS ECC P384 Root G5, O="DigiCert, Inc.", C=US
-Serial number: 3698fe712d519f3ced0fdb7b1643011
-Valid from: Fri Jan 15 00:00:00 GMT 2021 until: Sun Jan 14 23:59:59 GMT 2046
-Signature algorithm name: SHA384withECDSA
-Subject Public Key Algorithm: 384-bit EC (secp384r1) key
-Version: 3
------BEGIN CERTIFICATE-----
-MIICFjCCAZ2gAwIBAgIQA2mP5xLVGfPO0P23sWQwETAKBggqhkjOPQQDAzBNMQsw
-CQYDVQQGEwJVUzEXMBUGA1UEChMORGlnaUNlcnQsIEluYy4xJTAjBgNVBAMTHERp
-Z2lDZXJ0IENTIEVDQyBQMzg0IFJvb3QgRzUwHhcNMjEwMTE1MDAwMDAwWhcNNDYw
-MTE0MjM1OTU5WjBNMQswCQYDVQQGEwJVUzEXMBUGA1UEChMORGlnaUNlcnQsIElu
-Yy4xJTAjBgNVBAMTHERpZ2lDZXJ0IENTIEVDQyBQMzg0IFJvb3QgRzUwdjAQBgcq
-hkjOPQIBBgUrgQQAIgNiAAR/FK2Ftpf9AiE1TWDoOJOTmz0FEG2v0/7v+rv7c5nz
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------END CERTIFICATE-----

make/data/cacerts/digicertcsrsarootg5

@@ -1,38 +0,0 @@
-Owner: CN=DigiCert CS RSA4096 Root G5, O="DigiCert, Inc.", C=US
-Issuer: CN=DigiCert CS RSA4096 Root G5, O="DigiCert, Inc.", C=US
-Serial number: 6cee131be6d55c807f7c0c7fb44e620
-Valid from: Fri Jan 15 00:00:00 GMT 2021 until: Sun Jan 14 23:59:59 GMT 2046
-Signature algorithm name: SHA384withRSA
-Subject Public Key Algorithm: 4096-bit RSA key
-Version: 3
------BEGIN CERTIFICATE-----
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------END CERTIFICATE-----

make/data/cacerts/digicerttlseccrootg5

@@ -1,21 +0,0 @@
-Owner: CN=DigiCert TLS ECC P384 Root G5, O="DigiCert, Inc.", C=US
-Issuer: CN=DigiCert TLS ECC P384 Root G5, O="DigiCert, Inc.", C=US
-Serial number: 9e09365acf7d9c8b93e1c0b042a2ef3
-Valid from: Fri Jan 15 00:00:00 GMT 2021 until: Sun Jan 14 23:59:59 GMT 2046
-Signature algorithm name: SHA384withECDSA
-Subject Public Key Algorithm: 384-bit EC (secp384r1) key
-Version: 3
------BEGIN CERTIFICATE-----
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------END CERTIFICATE-----

make/data/cacerts/digicerttlsrsarootg5

@@ -1,38 +0,0 @@
-Owner: CN=DigiCert TLS RSA4096 Root G5, O="DigiCert, Inc.", C=US
-Issuer: CN=DigiCert TLS RSA4096 Root G5, O="DigiCert, Inc.", C=US
-Serial number: 8f9b478a8fa7eda6a333789de7ccf8a
-Valid from: Fri Jan 15 00:00:00 GMT 2021 until: Sun Jan 14 23:59:59 GMT 2046
-Signature algorithm name: SHA384withRSA
-Subject Public Key Algorithm: 4096-bit RSA key
-Version: 3
------BEGIN CERTIFICATE-----
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------END CERTIFICATE-----

make/data/cacerts/emsigneccrootcag3

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-Owner: CN=emSign ECC Root CA - G3, O=eMudhra Technologies Limited, OU=emSign PKI, C=IN
-Issuer: CN=emSign ECC Root CA - G3, O=eMudhra Technologies Limited, OU=emSign PKI, C=IN
-Serial number: 3cf607a968700eda8b84
-Valid from: Sun Feb 18 18:30:00 GMT 2018 until: Wed Feb 18 18:30:00 GMT 2043
-Signature algorithm name: SHA384withECDSA
-Subject Public Key Algorithm: 384-bit EC (secp384r1) key
-Version: 3
------BEGIN CERTIFICATE-----
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------END CERTIFICATE-----

make/data/cacerts/emsignrootcag1

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-Owner: CN=emSign Root CA - G1, O=eMudhra Technologies Limited, OU=emSign PKI, C=IN
-Issuer: CN=emSign Root CA - G1, O=eMudhra Technologies Limited, OU=emSign PKI, C=IN
-Serial number: 31f5e4620c6c58edd6d8
-Valid from: Sun Feb 18 18:30:00 GMT 2018 until: Wed Feb 18 18:30:00 GMT 2043
-Signature algorithm name: SHA256withRSA
-Subject Public Key Algorithm: 2048-bit RSA key
-Version: 3
------BEGIN CERTIFICATE-----
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------END CERTIFICATE-----

make/data/cacerts/emsignrootcag2

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-Owner: CN=emSign Root CA - G2, O=eMudhra Technologies Limited, OU=emSign PKI, C=IN
-Issuer: CN=emSign Root CA - G2, O=eMudhra Technologies Limited, OU=emSign PKI, C=IN
-Serial number: 864dbf0fe35ed77d8ed8
-Valid from: Sun Feb 18 18:30:00 GMT 2018 until: Wed Feb 18 18:30:00 GMT 2043
-Signature algorithm name: SHA384withRSA
-Subject Public Key Algorithm: 4096-bit RSA key
-Version: 3
------BEGIN CERTIFICATE-----
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------END CERTIFICATE-----

make/data/cacerts/letsencryptisrgx2

@@ -1,21 +0,0 @@
-Owner: CN=ISRG Root X2, O=Internet Security Research Group, C=US
-Issuer: CN=ISRG Root X2, O=Internet Security Research Group, C=US
-Serial number: 41d29dd172eaeea780c12c6ce92f8752
-Valid from: Fri Sep 04 00:00:00 GMT 2020 until: Mon Sep 17 16:00:00 GMT 2040
-Signature algorithm name: SHA384withECDSA
-Subject Public Key Algorithm: 384-bit EC (secp384r1) key
-Version: 3
------BEGIN CERTIFICATE-----
-MIICGzCCAaGgAwIBAgIQQdKd0XLq7qeAwSxs6S+HUjAKBggqhkjOPQQDAzBPMQsw
-CQYDVQQGEwJVUzEpMCcGA1UEChMgSW50ZXJuZXQgU2VjdXJpdHkgUmVzZWFyY2gg
-R3JvdXAxFTATBgNVBAMTDElTUkcgUm9vdCBYMjAeFw0yMDA5MDQwMDAwMDBaFw00
-MDA5MTcxNjAwMDBaME8xCzAJBgNVBAYTAlVTMSkwJwYDVQQKEyBJbnRlcm5ldCBT
-ZWN1cml0eSBSZXNlYXJjaCBHcm91cDEVMBMGA1UEAxMMSVNSRyBSb290IFgyMHYw
-EAYHKoZIzj0CAQYFK4EEACIDYgAEzZvVn4CDCuwJSvMWSj5cz3es3mcFDR0HttwW
-+1qLFNvicWDEukWVEYmO6gbf9yoWHKS5xcUy4APgHoIYOIvXRdgKam7mAHf7AlF9
-ItgKbppbd9/w+kHsOdx1ymgHDB/qo0IwQDAOBgNVHQ8BAf8EBAMCAQYwDwYDVR0T
-AQH/BAUwAwEB/zAdBgNVHQ4EFgQUfEKWrt5LSDv6kviejM9ti6lyN5UwCgYIKoZI
-zj0EAwMDaAAwZQIwe3lORlCEwkSHRhtFcP9Ymd70/aTSVaYgLXTWNLxBo1BfASdW
-tL4ndQavEi51mI38AjEAi/V3bNTIZargCyzuFJ0nN6T5U6VR5CmD1/iQMVtCnwr1
-/q4AaOeMSQ+2b1tbFfLn
------END CERTIFICATE-----

make/data/cacerts/teliarootcav2

@@ -1,39 +0,0 @@
-Owner: CN=Telia Root CA v2, O=Telia Finland Oyj, C=FI
-Issuer: CN=Telia Root CA v2, O=Telia Finland Oyj, C=FI
-Serial number: 1675f27d6fe7ae3e4acbe095b059e
-Valid from: Thu Nov 29 11:55:54 GMT 2018 until: Sun Nov 29 11:55:54 GMT 2043
-Signature algorithm name: SHA256withRSA
-Subject Public Key Algorithm: 4096-bit RSA key
-Version: 3
------BEGIN CERTIFICATE-----
-MIIFdDCCA1ygAwIBAgIPAWdfJ9b+euPkrL4JWwWeMA0GCSqGSIb3DQEBCwUAMEQx
-CzAJBgNVBAYTAkZJMRowGAYDVQQKDBFUZWxpYSBGaW5sYW5kIE95ajEZMBcGA1UE
-AwwQVGVsaWEgUm9vdCBDQSB2MjAeFw0xODExMjkxMTU1NTRaFw00MzExMjkxMTU1
-NTRaMEQxCzAJBgNVBAYTAkZJMRowGAYDVQQKDBFUZWxpYSBGaW5sYW5kIE95ajEZ
-MBcGA1UEAwwQVGVsaWEgUm9vdCBDQSB2MjCCAiIwDQYJKoZIhvcNAQEBBQADggIP
-ADCCAgoCggIBALLQPwe84nvQa5n44ndp586dpAO8gm2h/oFlH0wnrI4AuhZ76zBq
-AMCzdGh+sq/H1WKzej9Qyow2RCRj0jbpDIX2Q3bVTKFgcmfiKDOlyzG4OiIjNLh9
-vVYiQJ3q9HsDrWj8soFPmNB06o3lfc1jw6P23pLCWBnglrvFxKk9pXSW/q/5iaq9
-lRdU2HhE8Qx3FZLgmEKnpNaqIJLNwaCzlrI6hEKNfdWV5Nbb6WLEWLN5xYzTNTOD
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-6GwLI1GpJQXrSPjdscr6bAhR77cYbETKJuFzxokGgeWKrLDiKca5JLNrRBH0pUPC
-TEPlcDaMtjNXepUugqD0XBCzYYP2AgWGLnwtbNwDRm41k9V6lS/eINhbfpSQBGq6
-WT0EBXWdN6IOLj3rwaRSg/7Qa9RmjtzG6RJOHSpXqhC8fF6CfaamyfItufUXJ63R
-DolUK5X6wK0dmBR4M0KGCqlztft0DbcbMBnEWg4cJ7faGND/isgFuvGqHKI3t+ZI
-pEYslOqodmJHixBTB0hXbOKSTbauBcvcwUpej6w9GU7C7WB1K9vBykLVAgMBAAGj
-YzBhMB8GA1UdIwQYMBaAFHKs5DN5qkWH9v2sHZ7Wxy+G2CQ5MB0GA1UdDgQWBBRy
-rOQzeapFh/b9rB2e1scvhtgkOTAOBgNVHQ8BAf8EBAMCAQYwDwYDVR0TAQH/BAUw
-AwEB/zANBgkqhkiG9w0BAQsFAAOCAgEAoDtZpwmUPjaE0n4vOaWWl/oRrfxn83EJ
-8rKJhGdEr7nv7ZbsnGTbMjBvZ5qsfl+yqwE2foH65IRe0qw24GtixX1LDoJt0nZi
-0f6X+J8wfBj5tFJ3gh1229MdqfDBmgC9bXXYfef6xzijnHDoRnkDry5023X4blMM
-A8iZGok1GTzTyVR8qPAs5m4HeW9q4ebqkYJpCh3DflminmtGFZhb069GHWLIzoBS
-SRE/yQQSwxN8PzuKlts8oB4KtItUsiRnDe+Cy748fdHif64W1lZYudogsYMVoe+K
-TTJvQS8TUoKU1xrBeKJR3Stwbbca+few4GeXVtt8YVMJAygCQMez2P2ccGrGKMOF
-6eLtGpOg3kuYooQ+BXcBlj37tCAPnHICehIv1aO6UXivKitEZU61/Qrowc15h2Er
-3oBXRb9n8ZuRXqWk7FlIEA04x7D6w0RtBPV4UBySllva9bguulvP5fBqnUsvWHMt
-Ty3EHD70sz+rFQ47GUGKpMFXEmZxTPpT41frYpUJnlTd0cI8Vzy9OK2YZLe4A5pT
-VmBds9hCG1xLEooc6+t9xnppxyd/pPiL8uSUZodL6ZQHCRJ5irLrdATczvREWeAW
-ysUsWNc8e89ihmpQfTU2Zqf7N+cox9jQraVplI/owd8k+BsHMYeB2F326CjYSlKA
-rBPuUBQemMc=
------END CERTIFICATE-----

make/data/currency/CurrencyData.properties

@@ -32,7 +32,7 @@ formatVersion=3
 # Version of the currency code information in this class.
 # It is a serial number that accompanies with each amendment.
 
-dataVersion=176
+dataVersion=175
 
 # List of all valid ISO 4217 currency codes.
 # To ensure compatibility, do not remove codes.
@@ -55,7 +55,7 @@ all=ADP020-AED784-AFA004-AFN971-ALL008-AMD051-ANG532-AOA973-ARS032-ATS040-AUD036
     SRD968-SRG740-SSP728-STD678-STN930-SVC222-SYP760-SZL748-THB764-TJS972-TMM795-TMT934-TND788-TOP776-\
     TPE626-TRL792-TRY949-TTD780-TWD901-TZS834-UAH980-UGX800-USD840-USN997-USS998-UYI940-\
     UYU858-UZS860-VEB862-VED926-VEF937-VES928-VND704-VUV548-WST882-XAF950-XAG961-XAU959-XBA955-\
-    XBB956-XBC957-XBD958-XCD951-XCG532-XDR960-XFO000-XFU000-XOF952-XPD964-XPF953-\
+    XBB956-XBC957-XBD958-XCD951-XDR960-XFO000-XFU000-XOF952-XPD964-XPF953-\
     XPT962-XSU994-XTS963-XUA965-XXX999-YER886-YUM891-ZAR710-ZMK894-ZMW967-ZWD716-ZWL932-\
     ZWN942-ZWR935
 
@@ -189,11 +189,11 @@ CR=CRC
 # COTE D'IVOIRE
 CI=XOF
 # CROATIA
-HR=EUR
+HR=HRK;2022-12-31-23-00-00;EUR
 # CUBA
 CU=CUP
 # Cura\u00e7ao
-CW=ANG;2025-04-01-04-00-00;XCG
+CW=ANG
 # CYPRUS
 CY=EUR
 # CZECHIA
@@ -510,7 +510,7 @@ SR=SRD
 # SVALBARD AND JAN MAYEN
 SJ=NOK
 # Sint Maarten (Dutch part)
-SX=ANG;2025-04-01-04-00-00;XCG
+SX=ANG
 # ESWATINI
 SZ=SZL
 # SWEDEN

make/data/publicsuffixlist/VERSION

@@ -1,2 +1,2 @@
-Github: https://raw.githubusercontent.com/publicsuffix/list/b5bf572c52988dbe9d865b8f090ea819024a9936/public_suffix_list.dat
-Date: 2023-11-09
+Github: https://raw.githubusercontent.com/publicsuffix/list/88467c960d6cdad2ca1623e892e5e17506bc269f/public_suffix_list.dat
+Date: 2023-04-14

make/data/tzdata/VERSION

@@ -21,4 +21,4 @@
 # or visit www.oracle.com if you need additional information or have any
 # questions.
 #
-tzdata2024a
+tzdata2023c

make/data/tzdata/africa

@@ -53,10 +53,6 @@
 # Milne J. Civil time. Geogr J. 1899 Feb;13(2):173-94.
 # https://www.jstor.org/stable/1774359
 #
-# For the 1911/1912 establishment of standard time in French possessions, see:
-# Société Française de Physique, Recueil de constantes physiques (1913),
-# page 752, 18b.
-#
 # European-style abbreviations are commonly used along the Mediterranean.
 # For sub-Saharan Africa abbreviations were less standardized.
 # Previous editions of this database used WAT, CAT, SAT, and EAT
@@ -140,7 +136,7 @@ Zone Atlantic/Cape_Verde -1:34:04 -	LMT	1912 Jan 01  2:00u # Praia
 
 # Chad
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
-Zone	Africa/Ndjamena	1:00:12 -	LMT	1912 Jan  1 # N'Djamena
+Zone	Africa/Ndjamena	1:00:12 -	LMT	1912        # N'Djamena
 			1:00	-	WAT	1979 Oct 14
 			1:00	1:00	WAST	1980 Mar  8
 			1:00	-	WAT
@@ -166,7 +162,7 @@ Zone	Africa/Ndjamena	1:00:12 -	LMT	1912 Jan  1 # N'Djamena
 #	Inaccessible, Nightingale: uninhabited
 
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
-Zone	Africa/Abidjan	-0:16:08 -	LMT	1912 Jan  1
+Zone	Africa/Abidjan	-0:16:08 -	LMT	1912
 			 0:00	-	GMT
 
 ###############################################################################
@@ -312,6 +308,13 @@ Rule	Egypt	2007	only	-	Sep	Thu>=1	24:00	0	-
 # reproduced by other (more accessible) sites[, e.g.,]...
 # http://elgornal.net/news/news.aspx?id=4699258
 
+# From Paul Eggert (2014-06-04):
+# Sarah El Deeb and Lee Keath of AP report that the Egyptian government says
+# the change is because of blackouts in Cairo, even though Ahram Online (cited
+# above) says DST had no affect on electricity consumption.  There is
+# no information about when DST will end this fall.  See:
+# http://abcnews.go.com/International/wireStory/el-sissi-pushes-egyptians-line-23614833
+
 # From Steffen Thorsen (2015-04-08):
 # Egypt will start DST on midnight after Thursday, April 30, 2015.
 # This is based on a law (no 35) from May 15, 2014 saying it starts the last

make/data/tzdata/antarctica

@@ -103,11 +103,6 @@
 # - 2018 Oct  7 4:00 - 2019 Mar 17 3:00 - 2019 Oct  4 3:00 - 2020 Mar  8 3:00
 # and now - 2020 Oct  4 0:01
 
-# From Paul Eggert (2023-12-20):
-# Transitions from 2021 on are taken from:
-# https://www.timeanddate.com/time/zone/antarctica/casey
-# retrieved at various dates.
-
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
 Zone Antarctica/Casey	 0	-	-00	1969
 			 8:00	-	+08	2009 Oct 18  2:00
@@ -121,12 +116,7 @@ Zone Antarctica/Casey	 0	-	-00	1969
 			 8:00	-	+08	2019 Oct  4  3:00
 			11:00	-	+11	2020 Mar  8  3:00
 			 8:00	-	+08	2020 Oct  4  0:01
-			11:00	-	+11	2021 Mar 14  0:00
-			 8:00	-	+08	2021 Oct  3  0:01
-			11:00	-	+11	2022 Mar 13  0:00
-			 8:00	-	+08	2022 Oct  2  0:01
-			11:00	-	+11	2023 Mar  9  3:00
-			 8:00	-	+08
+			11:00	-	+11
 Zone Antarctica/Davis	0	-	-00	1957 Jan 13
 			7:00	-	+07	1964 Nov
 			0	-	-00	1969 Feb
@@ -273,50 +263,7 @@ Zone Antarctica/Troll	0	-	-00	2005 Feb 12
 #	year-round from 1960/61 to 1992
 
 # Vostok, since 1957-12-16, temporarily closed 1994-02/1994-11
-# From Craig Mundell (1994-12-15):
-# http://quest.arc.nasa.gov/antarctica/QA/computers/Directions,Time,ZIP
-# Vostok, which is one of the Russian stations, is set on the same
-# time as Moscow, Russia.
-#
-# From Lee Hotz (2001-03-08):
-# I queried the folks at Columbia who spent the summer at Vostok and this is
-# what they had to say about time there:
-# "in the US Camp (East Camp) we have been on New Zealand (McMurdo)
-# time, which is 12 hours ahead of GMT. The Russian Station Vostok was
-# 6 hours behind that (although only 2 miles away, i.e. 6 hours ahead
-# of GMT). This is a time zone I think two hours east of Moscow. The
-# natural time zone is in between the two: 8 hours ahead of GMT."
-#
-# From Paul Eggert (2001-05-04):
-# This seems to be hopelessly confusing, so I asked Lee Hotz about it
-# in person.  He said that some Antarctic locations set their local
-# time so that noon is the warmest part of the day, and that this
-# changes during the year and does not necessarily correspond to mean
-# solar noon.  So the Vostok time might have been whatever the clocks
-# happened to be during their visit.  So we still don't really know what time
-# it is at Vostok.
-#
-# From Zakhary V. Akulov (2023-12-17 22:00:48 +0700):
-# ... from December, 18, 2023 00:00 by my decision the local time of
-# the Antarctic research base Vostok will correspond to UTC+5.
-# (2023-12-19): We constantly interact with Progress base, with company who
-# builds new wintering station, with sledge convoys, with aviation - they all
-# use UTC+5. Besides, difference between Moscow time is just 2 hours now, not 4.
-# (2023-12-19, in response to the question "Has local time at Vostok
-# been UTC+6 ever since 1957, or has it changed before?"): No. At least
-# since my antarctic career start, 10 years ago, Vostok base has UTC+7.
-# (In response to a 2023-12-18 question "from 02:00 to 00:00 today"): This.
-#
-# From Paul Eggert (2023-12-18):
-# For lack of better info, guess Vostok was at +07 from founding through today,
-# except when closed.
-
-# Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
-Zone Antarctica/Vostok	0	-	-00	1957 Dec 16
-			7:00	-	+07	1994 Feb
-			0	-	-00	1994 Nov
-			7:00	-	+07	2023 Dec 18  2:00
-			5:00	-	+05
+# See Asia/Urumqi.
 
 # S Africa - year-round bases
 # Marion Island, -4653+03752

make/data/tzdata/asia

@@ -678,6 +678,7 @@ Zone	Asia/Shanghai	8:05:43	-	LMT	1901
 			8:00	PRC	C%sT
 # Xinjiang time, used by many in western China; represented by Ürümqi / Ürümchi
 # / Wulumuqi.  (Please use Asia/Shanghai if you prefer Beijing time.)
+# Vostok base in Antarctica matches this since 1970.
 Zone	Asia/Urumqi	5:50:20	-	LMT	1928
 			6:00	-	+06
 
@@ -2480,33 +2481,18 @@ Zone	Asia/Amman	2:23:44 -	LMT	1931
 # effective December 21st, 2018....
 # http://adilet.zan.kz/rus/docs/P1800000817 (russian language).
 
-# From Zhanbolat Raimbekov (2024-01-19):
-# Kazakhstan (all parts) switching to UTC+5 on March 1, 2024
-# https://www.gov.kz/memleket/entities/mti/press/news/details/688998?lang=ru
-# [in Russian]
-# (2024-01-20): https://primeminister.kz/ru/decisions/19012024-20
-#
-# From Alexander Krivenyshev (2024-01-19):
-# According to a different news and the official web site for the Ministry of
-# Trade and Integration of the Republic of Kazakhstan:
-# https://en.inform.kz/news/kazakhstan-to-switch-to-single-hour-zone-mar-1-54ad0b/
-
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
 #
 # Almaty (formerly Alma-Ata), representing most locations in Kazakhstan
-# This includes Abai/Abay (ISO 3166-2 code KZ-10), Aqmola/Akmola (KZ-11),
-# Almaty (KZ-19), Almaty city (KZ-75), Astana city (KZ-71),
-# East Kazkhstan (KZ-63), Jambyl/Zhambyl (KZ-31), Jetisu/Zhetysu (KZ-33),
-# Karaganda (KZ-35), North Kazakhstan (KZ-59), Pavlodar (KZ-55),
-# Shyumkent city (KZ-79), Turkistan (KZ-61), and Ulytau (KZ-62).
+# This includes KZ-AKM, KZ-ALA, KZ-ALM, KZ-AST, KZ-BAY, KZ-VOS, KZ-ZHA,
+# KZ-KAR, KZ-SEV, KZ-PAV, and KZ-YUZ.
 Zone	Asia/Almaty	5:07:48 -	LMT	1924 May  2 # or Alma-Ata
 			5:00	-	+05	1930 Jun 21
 			6:00 RussiaAsia +06/+07	1991 Mar 31  2:00s
 			5:00 RussiaAsia	+05/+06	1992 Jan 19  2:00s
 			6:00 RussiaAsia	+06/+07	2004 Oct 31  2:00s
-			6:00	-	+06	2024 Mar  1  0:00
-			5:00	-	+05
-# Qyzylorda (aka Kyzylorda, Kizilorda, Kzyl-Orda, etc.) (KZ-43)
+			6:00	-	+06
+# Qyzylorda (aka Kyzylorda, Kizilorda, Kzyl-Orda, etc.) (KZ-KZY)
 Zone	Asia/Qyzylorda	4:21:52 -	LMT	1924 May  2
 			4:00	-	+04	1930 Jun 21
 			5:00	-	+05	1981 Apr  1
@@ -2519,7 +2505,8 @@ Zone	Asia/Qyzylorda	4:21:52 -	LMT	1924 May  2
 			5:00 RussiaAsia	+05/+06	2004 Oct 31  2:00s
 			6:00	-	+06	2018 Dec 21  0:00
 			5:00	-	+05
-# Qostanay (aka Kostanay, Kustanay) (KZ-39)
+#
+# Qostanay (aka Kostanay, Kustanay) (KZ-KUS)
 # The 1991/2 rules are unclear partly because of the 1997 Turgai
 # reorganization.
 Zone	Asia/Qostanay	4:14:28 -	LMT	1924 May  2
@@ -2530,9 +2517,9 @@ Zone	Asia/Qostanay	4:14:28 -	LMT	1924 May  2
 			5:00 RussiaAsia	+05/+06	1991 Mar 31  2:00s
 			4:00 RussiaAsia	+04/+05	1992 Jan 19  2:00s
 			5:00 RussiaAsia	+05/+06	2004 Oct 31  2:00s
-			6:00	-	+06	2024 Mar  1  0:00
-			5:00	-	+05
-# Aqtöbe (aka Aktobe, formerly Aktyubinsk) (KZ-15)
+			6:00	-	+06
+
+# Aqtöbe (aka Aktobe, formerly Aktyubinsk) (KZ-AKT)
 Zone	Asia/Aqtobe	3:48:40	-	LMT	1924 May  2
 			4:00	-	+04	1930 Jun 21
 			5:00	-	+05	1981 Apr  1
@@ -2542,7 +2529,7 @@ Zone	Asia/Aqtobe	3:48:40	-	LMT	1924 May  2
 			4:00 RussiaAsia	+04/+05	1992 Jan 19  2:00s
 			5:00 RussiaAsia	+05/+06	2004 Oct 31  2:00s
 			5:00	-	+05
-# Mangghystaū (KZ-47)
+# Mangghystaū (KZ-MAN)
 # Aqtau was not founded until 1963, but it represents an inhabited region,
 # so include timestamps before 1963.
 Zone	Asia/Aqtau	3:21:04	-	LMT	1924 May  2
@@ -2554,7 +2541,7 @@ Zone	Asia/Aqtau	3:21:04	-	LMT	1924 May  2
 			5:00 RussiaAsia	+05/+06	1994 Sep 25  2:00s
 			4:00 RussiaAsia	+04/+05	2004 Oct 31  2:00s
 			5:00	-	+05
-# Atyraū (KZ-23) is like Mangghystaū except it switched from
+# Atyraū (KZ-ATY) is like Mangghystaū except it switched from
 # +04/+05 to +05/+06 in spring 1999, not fall 1994.
 Zone	Asia/Atyrau	3:27:44	-	LMT	1924 May  2
 			3:00	-	+03	1930 Jun 21
@@ -2565,7 +2552,7 @@ Zone	Asia/Atyrau	3:27:44	-	LMT	1924 May  2
 			5:00 RussiaAsia	+05/+06	1999 Mar 28  2:00s
 			4:00 RussiaAsia	+04/+05	2004 Oct 31  2:00s
 			5:00	-	+05
-# West Kazakhstan (KZ-27)
+# West Kazakhstan (KZ-ZAP)
 # From Paul Eggert (2016-03-18):
 # The 1989 transition is from USSR act No. 227 (1989-03-14).
 Zone	Asia/Oral	3:25:24	-	LMT	1924 May  2 # or Ural'sk
@@ -3463,30 +3450,20 @@ Zone	Asia/Karachi	4:28:12 -	LMT	1907
 # From Heba Hamad (2023-03-22):
 # ... summer time will begin in Palestine from Saturday 04-29-2023,
 # 02:00 AM by 60 minutes forward.
-# From Heba Hemad (2023-10-09):
-# ... winter time will begin in Palestine from Saturday 10-28-2023,
-# 02:00 AM by 60 minutes back.
 #
-# From Heba Hamad (2024-01-25):
-# the summer time for the years 2024,2025 will begin in Palestine
-# from Saturday at 02:00 AM by 60 minutes forward as shown below:
-# year date
-# 2024 2024-04-20
-# 2025 2025-04-12
-#
-# From Paul Eggert (2024-01-25):
+# From Paul Eggert (2023-03-22):
 # For now, guess that spring and fall transitions will normally
 # continue to use 2022's rules, that during DST Palestine will switch
 # to standard time at 02:00 the last Saturday before Ramadan and back
-# to DST at 02:00 the second Saturday after Ramadan, and that
+# to DST at 02:00 the first Saturday after Ramadan, and that
 # if the normal spring-forward or fall-back transition occurs during
 # Ramadan the former is delayed and the latter advanced.
 # To implement this, I predicted Ramadan-oriented transition dates for
-# 2026 through 2086 by running the following program under GNU Emacs 29.2,
+# 2023 through 2086 by running the following program under GNU Emacs 28.2,
 # with the results integrated by hand into the table below.
 # Predictions after 2086 are approximated without Ramadan.
 #
-# (let ((islamic-year 1447))
+# (let ((islamic-year 1444))
 #   (require 'cal-islam)
 #   (while (< islamic-year 1510)
 #     (let ((a (calendar-islamic-to-absolute (list 9 1 islamic-year)))
@@ -3495,7 +3472,6 @@ Zone	Asia/Karachi	4:28:12 -	LMT	1907
 #       (while (/= saturday (mod (setq a (1- a)) 7)))
 #       (while (/= saturday (mod b 7))
 #         (setq b (1+ b)))
-#       (setq b (+ 7 b))
 #       (setq a (calendar-gregorian-from-absolute a))
 #       (setq b (calendar-gregorian-from-absolute b))
 #       (insert
@@ -3546,84 +3522,84 @@ Rule Palestine	2021	only	-	Oct	29	1:00	0	-
 Rule Palestine	2022	only	-	Mar	27	0:00	1:00	S
 Rule Palestine	2022	2035	-	Oct	Sat<=30	2:00	0	-
 Rule Palestine	2023	only	-	Apr	29	2:00	1:00	S
-Rule Palestine	2024	only	-	Apr	20	2:00	1:00	S
-Rule Palestine	2025	only	-	Apr	12	2:00	1:00	S
+Rule Palestine	2024	only	-	Apr	13	2:00	1:00	S
+Rule Palestine	2025	only	-	Apr	 5	2:00	1:00	S
 Rule Palestine	2026	2054	-	Mar	Sat<=30	2:00	1:00	S
 Rule Palestine	2036	only	-	Oct	18	2:00	0	-
 Rule Palestine	2037	only	-	Oct	10	2:00	0	-
 Rule Palestine	2038	only	-	Sep	25	2:00	0	-
 Rule Palestine	2039	only	-	Sep	17	2:00	0	-
+Rule Palestine	2039	only	-	Oct	22	2:00	1:00	S
+Rule Palestine	2039	2067	-	Oct	Sat<=30	2:00	0	-
 Rule Palestine	2040	only	-	Sep	 1	2:00	0	-
-Rule Palestine	2040	only	-	Oct	20	2:00	1:00	S
-Rule Palestine	2040	2067	-	Oct	Sat<=30	2:00	0	-
+Rule Palestine	2040	only	-	Oct	13	2:00	1:00	S
 Rule Palestine	2041	only	-	Aug	24	2:00	0	-
-Rule Palestine	2041	only	-	Oct	 5	2:00	1:00	S
+Rule Palestine	2041	only	-	Sep	28	2:00	1:00	S
 Rule Palestine	2042	only	-	Aug	16	2:00	0	-
-Rule Palestine	2042	only	-	Sep	27	2:00	1:00	S
+Rule Palestine	2042	only	-	Sep	20	2:00	1:00	S
 Rule Palestine	2043	only	-	Aug	 1	2:00	0	-
-Rule Palestine	2043	only	-	Sep	19	2:00	1:00	S
+Rule Palestine	2043	only	-	Sep	12	2:00	1:00	S
 Rule Palestine	2044	only	-	Jul	23	2:00	0	-
-Rule Palestine	2044	only	-	Sep	 3	2:00	1:00	S
+Rule Palestine	2044	only	-	Aug	27	2:00	1:00	S
 Rule Palestine	2045	only	-	Jul	15	2:00	0	-
-Rule Palestine	2045	only	-	Aug	26	2:00	1:00	S
+Rule Palestine	2045	only	-	Aug	19	2:00	1:00	S
 Rule Palestine	2046	only	-	Jun	30	2:00	0	-
-Rule Palestine	2046	only	-	Aug	18	2:00	1:00	S
+Rule Palestine	2046	only	-	Aug	11	2:00	1:00	S
 Rule Palestine	2047	only	-	Jun	22	2:00	0	-
-Rule Palestine	2047	only	-	Aug	 3	2:00	1:00	S
+Rule Palestine	2047	only	-	Jul	27	2:00	1:00	S
 Rule Palestine	2048	only	-	Jun	 6	2:00	0	-
-Rule Palestine	2048	only	-	Jul	25	2:00	1:00	S
+Rule Palestine	2048	only	-	Jul	18	2:00	1:00	S
 Rule Palestine	2049	only	-	May	29	2:00	0	-
-Rule Palestine	2049	only	-	Jul	10	2:00	1:00	S
+Rule Palestine	2049	only	-	Jul	 3	2:00	1:00	S
 Rule Palestine	2050	only	-	May	21	2:00	0	-
-Rule Palestine	2050	only	-	Jul	 2	2:00	1:00	S
+Rule Palestine	2050	only	-	Jun	25	2:00	1:00	S
 Rule Palestine	2051	only	-	May	 6	2:00	0	-
-Rule Palestine	2051	only	-	Jun	24	2:00	1:00	S
+Rule Palestine	2051	only	-	Jun	17	2:00	1:00	S
 Rule Palestine	2052	only	-	Apr	27	2:00	0	-
-Rule Palestine	2052	only	-	Jun	 8	2:00	1:00	S
+Rule Palestine	2052	only	-	Jun	 1	2:00	1:00	S
 Rule Palestine	2053	only	-	Apr	12	2:00	0	-
-Rule Palestine	2053	only	-	May	31	2:00	1:00	S
+Rule Palestine	2053	only	-	May	24	2:00	1:00	S
 Rule Palestine	2054	only	-	Apr	 4	2:00	0	-
-Rule Palestine	2054	only	-	May	23	2:00	1:00	S
-Rule Palestine	2055	only	-	May	 8	2:00	1:00	S
-Rule Palestine	2056	only	-	Apr	29	2:00	1:00	S
-Rule Palestine	2057	only	-	Apr	14	2:00	1:00	S
-Rule Palestine	2058	only	-	Apr	 6	2:00	1:00	S
-Rule Palestine	2059	max	-	Mar	Sat<=30	2:00	1:00	S
+Rule Palestine	2054	only	-	May	16	2:00	1:00	S
+Rule Palestine	2055	only	-	May	 1	2:00	1:00	S
+Rule Palestine	2056	only	-	Apr	22	2:00	1:00	S
+Rule Palestine	2057	only	-	Apr	 7	2:00	1:00	S
+Rule Palestine	2058	max	-	Mar	Sat<=30	2:00	1:00	S
 Rule Palestine	2068	only	-	Oct	20	2:00	0	-
 Rule Palestine	2069	only	-	Oct	12	2:00	0	-
 Rule Palestine	2070	only	-	Oct	 4	2:00	0	-
 Rule Palestine	2071	only	-	Sep	19	2:00	0	-
 Rule Palestine	2072	only	-	Sep	10	2:00	0	-
-Rule Palestine	2072	only	-	Oct	22	2:00	1:00	S
-Rule Palestine	2072	max	-	Oct	Sat<=30	2:00	0	-
+Rule Palestine	2072	only	-	Oct	15	2:00	1:00	S
 Rule Palestine	2073	only	-	Sep	 2	2:00	0	-
-Rule Palestine	2073	only	-	Oct	14	2:00	1:00	S
+Rule Palestine	2073	only	-	Oct	 7	2:00	1:00	S
 Rule Palestine	2074	only	-	Aug	18	2:00	0	-
-Rule Palestine	2074	only	-	Oct	 6	2:00	1:00	S
+Rule Palestine	2074	only	-	Sep	29	2:00	1:00	S
 Rule Palestine	2075	only	-	Aug	10	2:00	0	-
-Rule Palestine	2075	only	-	Sep	21	2:00	1:00	S
+Rule Palestine	2075	only	-	Sep	14	2:00	1:00	S
+Rule Palestine	2075	max	-	Oct	Sat<=30	2:00	0	-
 Rule Palestine	2076	only	-	Jul	25	2:00	0	-
-Rule Palestine	2076	only	-	Sep	12	2:00	1:00	S
+Rule Palestine	2076	only	-	Sep	 5	2:00	1:00	S
 Rule Palestine	2077	only	-	Jul	17	2:00	0	-
-Rule Palestine	2077	only	-	Sep	 4	2:00	1:00	S
+Rule Palestine	2077	only	-	Aug	28	2:00	1:00	S
 Rule Palestine	2078	only	-	Jul	 9	2:00	0	-
-Rule Palestine	2078	only	-	Aug	20	2:00	1:00	S
+Rule Palestine	2078	only	-	Aug	13	2:00	1:00	S
 Rule Palestine	2079	only	-	Jun	24	2:00	0	-
-Rule Palestine	2079	only	-	Aug	12	2:00	1:00	S
+Rule Palestine	2079	only	-	Aug	 5	2:00	1:00	S
 Rule Palestine	2080	only	-	Jun	15	2:00	0	-
-Rule Palestine	2080	only	-	Jul	27	2:00	1:00	S
+Rule Palestine	2080	only	-	Jul	20	2:00	1:00	S
 Rule Palestine	2081	only	-	Jun	 7	2:00	0	-
-Rule Palestine	2081	only	-	Jul	19	2:00	1:00	S
+Rule Palestine	2081	only	-	Jul	12	2:00	1:00	S
 Rule Palestine	2082	only	-	May	23	2:00	0	-
-Rule Palestine	2082	only	-	Jul	11	2:00	1:00	S
+Rule Palestine	2082	only	-	Jul	 4	2:00	1:00	S
 Rule Palestine	2083	only	-	May	15	2:00	0	-
-Rule Palestine	2083	only	-	Jun	26	2:00	1:00	S
+Rule Palestine	2083	only	-	Jun	19	2:00	1:00	S
 Rule Palestine	2084	only	-	Apr	29	2:00	0	-
-Rule Palestine	2084	only	-	Jun	17	2:00	1:00	S
+Rule Palestine	2084	only	-	Jun	10	2:00	1:00	S
 Rule Palestine	2085	only	-	Apr	21	2:00	0	-
-Rule Palestine	2085	only	-	Jun	 9	2:00	1:00	S
+Rule Palestine	2085	only	-	Jun	 2	2:00	1:00	S
 Rule Palestine	2086	only	-	Apr	13	2:00	0	-
-Rule Palestine	2086	only	-	May	25	2:00	1:00	S
+Rule Palestine	2086	only	-	May	18	2:00	1:00	S
 
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
 Zone	Asia/Gaza	2:17:52	-	LMT	1900 Oct
@@ -3651,7 +3627,7 @@ Zone	Asia/Hebron	2:20:23	-	LMT	1900 Oct
 
 # Philippines
 
-# From Paul Eggert (2024-01-21):
+# From Paul Eggert (2018-11-18):
 # The Spanish initially used American (west-of-Greenwich) time.
 # It is unknown what time Manila kept when the British occupied it from
 # 1762-10-06 through 1764-04; for now assume it kept American time.
@@ -3659,7 +3635,7 @@ Zone	Asia/Hebron	2:20:23	-	LMT	1900 Oct
 # Philippines, issued a proclamation announcing that 1844-12-30 was to
 # be immediately followed by 1845-01-01; see R.H. van Gent's
 # History of the International Date Line
-# https://webspace.science.uu.nl/~gent0113/idl/idl_philippines.htm
+# https://www.staff.science.uu.nl/~gent0113/idl/idl_philippines.htm
 # The rest of the data entries are from Shanks & Pottenger.
 
 # From Jesper Nørgaard Welen (2006-04-26):
@@ -4086,8 +4062,7 @@ Zone	Asia/Tashkent	4:37:11 -	LMT	1924 May  2
 # The English-language name of Vietnam's most populous city is "Ho Chi Minh
 # City"; use Ho_Chi_Minh below to avoid a name of more than 14 characters.
 
-# From Paul Eggert (2024-01-14) after a 2014 heads-up from Trần Ngọc Quân
-# and a 2024-01-14 heads-up from Đoàn Trần Công Danh:
+# From Paul Eggert (2022-07-27) after a 2014 heads-up from Trần Ngọc Quân:
 # Trần Tiến Bình's authoritative book "Lịch Việt Nam: thế kỷ XX-XXI (1901-2100)"
 # (Nhà xuất bản Văn Hoá - Thông Tin, Hanoi, 2005), pp 49-50,
 # is quoted verbatim in:
@@ -4117,35 +4092,14 @@ Zone	Asia/Tashkent	4:37:11 -	LMT	1924 May  2
 #
 # Trần cites the following sources; it's unclear which supplied the info above.
 #
-#   Hoàng Xuân Hãn: "Lịch và lịch Việt Nam". Tập san Khoa học Xã hội,
-#   No. 9, Paris, February 1982.
+# Hoàng Xuân Hãn: "Lịch và lịch Việt Nam". Tập san Khoa học Xã hội,
+# No. 9, Paris, February 1982.
 #
-#   Lê Thành Lân: "Lịch và niên biểu lịch sử hai mươi thế kỷ (0001-2010)",
-#   NXB Thống kê, Hanoi, 2000.
+# Lê Thành Lân: "Lịch và niên biểu lịch sử hai mươi thế kỷ (0001-2010)",
+# NXB Thống kê, Hanoi, 2000.
 #
-#   Lê Thành Lân: "Lịch hai thế kỷ (1802-2010) và các lịch vĩnh cửu",
-#   NXB Thuận Hoá, Huế, 1995.
-#
-# Here is the decision for the September 1945 transition:
-# Võ Nguyên Giáp, Việt Nam Dân Quốc Công Báo, No. 1 (1945-09-29), page 13
-# http://baochi.nlv.gov.vn/baochi/cgi-bin/baochi?a=d&d=JwvzO19450929.2.5&dliv=none
-# It says that on 1945-09-01 at 24:00, Vietnam moved back two hours, to +07.
-# It also mentions a 1945-03-29 decree (by a Japanese Goveror-General)
-# to set the time zone to +09, but does not say whether that decree
-# merely legalized an earlier change to +09.
-#
-# July 1955 transition:
-# Ngô Đình Diệm, Công Báo Việt Nam, No. 92 (1955-07-02), page 1780-1781
-# Ordinance (Dụ) No. 46 (1955-06-25)
-# http://ddsnext.crl.edu/titles/32341#?c=0&m=29&s=0&cv=4&r=0&xywh=-89%2C342%2C1724%2C1216
-# It says that on 1955-07-01 at 01:00, South Vietnam moved back 1 hour (to +07).
-#
-# December 1959 transition:
-# Ngô Đình Diệm, Công Báo Việt Nam Cộng Hòa, 1960 part 1 (1960-01-02), page 62
-# Decree (Sắc lệnh) No. 362-TTP (1959-12-30)
-# http://ddsnext.crl.edu/titles/32341#?c=0&m=138&s=0&cv=793&r=0&xywh=-54%2C1504%2C1705%2C1202
-# It says that on 1959-12-31 at 23:00, South Vietnam moved forward 1 hour (to +08).
-
+# Lê Thành Lân: "Lịch hai thế kỷ (1802-2010) và các lịch vĩnh cửu",
+# NXB Thuận Hoá, Huế, 1995.
 
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
 		#STDOFF	7:06:30.13
@@ -4153,9 +4107,9 @@ Zone Asia/Ho_Chi_Minh	7:06:30 -	LMT	1906 Jul  1
 			7:06:30	-	PLMT	1911 May  1 # Phù Liễn MT
 			7:00	-	+07	1942 Dec 31 23:00
 			8:00	-	+08	1945 Mar 14 23:00
-			9:00	-	+09	1945 Sep  1 24:00
+			9:00	-	+09	1945 Sep  2
 			7:00	-	+07	1947 Apr  1
-			8:00	-	+08	1955 Jul  1 01:00
+			8:00	-	+08	1955 Jul  1
 			7:00	-	+07	1959 Dec 31 23:00
 			8:00	-	+08	1975 Jun 13
 			7:00	-	+07

make/data/tzdata/australasia

@@ -414,14 +414,8 @@ Zone Antarctica/Macquarie 0	-	-00	1899 Nov
 # Please note that there will not be any daylight savings time change
 # in Fiji for 2022-2023....
 # https://www.facebook.com/FijianGovernment/posts/pfbid0mmWVTYmTibn66ybpFda75pDcf34SSpoSaskJW5gXwaKo5Sgc7273Q4fXWc6kQV6Hl
-
-# From Almaz Mingaleev (2023-10-06):
-# Cabinet approved the suspension of Daylight Saving and appropriate
-# legislative changes will be considered including the repeal of the
-# Daylight Saving Act 1998
-# https://www.fiji.gov.fj/Media-Centre/Speeches/English/CABINET-DECISIONS-3-OCTOBER-2023
 #
-# From Paul Eggert (2023-10-06):
+# From Paul Eggert (2022-10-27):
 # For now, assume DST is suspended indefinitely.
 
 # Rule	NAME	FROM	TO	-	IN	ON	AT	SAVE	LETTER/S
@@ -443,11 +437,11 @@ Zone	Pacific/Fiji	11:55:44 -	LMT	1915 Oct 26 # Suva
 
 # French Polynesia
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
-Zone	Pacific/Gambier	 -8:59:48 -	LMT	1912 Oct  1 # Rikitea
+Zone	Pacific/Gambier	 -8:59:48 -	LMT	1912 Oct # Rikitea
 			 -9:00	-	-09
-Zone	Pacific/Marquesas -9:18:00 -	LMT	1912 Oct  1
+Zone	Pacific/Marquesas -9:18:00 -	LMT	1912 Oct
 			 -9:30	-	-0930
-Zone	Pacific/Tahiti	 -9:58:16 -	LMT	1912 Oct  1 # Papeete
+Zone	Pacific/Tahiti	 -9:58:16 -	LMT	1912 Oct # Papeete
 			-10:00	-	-10
 # Clipperton (near North America) is administered from French Polynesia;
 # it is uninhabited.
@@ -825,7 +819,7 @@ Zone Pacific/Apia	 12:33:04 -	LMT	1892 Jul  5
 # Solomon Is
 # excludes Bougainville, for which see Papua New Guinea
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
-Zone Pacific/Guadalcanal 10:39:48 -	LMT	1912 Oct  1 # Honiara
+Zone Pacific/Guadalcanal 10:39:48 -	LMT	1912 Oct # Honiara
 			11:00	-	+11
 
 # Tokelau
@@ -986,10 +980,6 @@ Zone	Pacific/Efate	11:13:16 -	LMT	1912 Jan 13 # Vila
 # Milne J. Civil time. Geogr J. 1899 Feb;13(2):173-94.
 # https://www.jstor.org/stable/1774359
 #
-# For the 1911/1912 establishment of standard time in French possessions, see:
-# Société Française de Physique, Recueil de constantes physiques (1913),
-# page 752, 18b.
-#
 # A reliable and entertaining source about time zones is
 # Derek Howse, Greenwich time and longitude, Philip Wilson Publishers (1997).
 #
@@ -2066,7 +2056,7 @@ Zone	Pacific/Efate	11:13:16 -	LMT	1912 Jan 13 # Vila
 # ordaining - by a masterpiece of diplomatic flattery - that
 # the Fourth of July should be celebrated twice in that year."
 # This happened in 1892, according to the Evening News (Sydney) of 1892-07-20.
-# https://webspace.science.uu.nl/~gent0113/idl/idl_alaska_samoa.htm
+# https://www.staff.science.uu.nl/~gent0113/idl/idl.htm
 
 # Although Shanks & Pottenger says they both switched to UT -11:30
 # in 1911, and to -11 in 1950. many earlier sources give -11

make/data/tzdata/backward

@@ -228,6 +228,7 @@ Link	America/Puerto_Rico	America/Tortola
 Link	Pacific/Port_Moresby	Antarctica/DumontDUrville
 Link	Pacific/Auckland	Antarctica/McMurdo
 Link	Asia/Riyadh		Antarctica/Syowa
+Link	Asia/Urumqi		Antarctica/Vostok
 Link	Europe/Berlin		Arctic/Longyearbyen
 Link	Asia/Riyadh		Asia/Aden
 Link	Asia/Qatar		Asia/Bahrain

make/data/tzdata/etcetera

@@ -28,7 +28,7 @@
 
 # These entries are for uses not otherwise covered by the tz database.
 # Their main practical use is for platforms like Android that lack
-# support for POSIX.1-2017-style TZ strings.  On such platforms these entries
+# support for POSIX-style TZ strings.  On such platforms these entries
 # can be useful if the timezone database is wrong or if a ship or
 # aircraft at sea is not in a timezone.
 

make/data/tzdata/europe

@@ -1013,34 +1013,9 @@ Zone	Europe/Sofia	1:33:16 -	LMT	1880
 # Czech Republic (Czechia)
 # Slovakia
 #
-# From Ivan Benovic (2024-01-30):
-# https://www.slov-lex.sk/pravne-predpisy/SK/ZZ/1946/54/
-# (This is an official link to the Czechoslovak Summer Time Act of
-# March 8, 1946 that authorizes the Czechoslovak government to set the
-# exact dates of change to summer time and back to Central European Time.
-# The act also implicitly confirms Central European Time as the
-# official time zone of Czechoslovakia and currently remains in force
-# in both the Czech Republic and Slovakia.)
-# https://www.psp.cz/eknih/1945pns/tisky/t0216_00.htm
-# (This is a link to the original legislative proposal dating back to
-# February 22, 1946. The accompanying memorandum to the proposal says
-# that an advisory committee on European railroad transportation that
-# met in Brussels in October 1945 decided that the change of time
-# should be carried out in all participating countries in a strictly
-# coordinated manner....)
-#
-# From Paul Eggert (2024-01-30):
-# The source for Czech data is: Kdy začíná a končí letní čas.
+# From Paul Eggert (2018-04-15):
+# The source for Czech data is: Kdy začíná a končí letní čas. 2018-04-15.
 # https://kalendar.beda.cz/kdy-zacina-a-konci-letni-cas
-# Its main text disagrees with its quoted sources only in 1918,
-# where the main text says spring and autumn transitions
-# occurred at 02:00 and 03:00 respectively (as usual),
-# whereas the 1918 source "Oznámení o zavedení letního času v roce 1918"
-# says transitions were at 01:00 and 02:00 respectively.
-# As the 1918 source appears to be a humorous piece, and it is
-# unlikely that Prague would have disagreed with its neighbors by an hour,
-# go with the main text for now.
-#
 # We know of no English-language name for historical Czech winter time;
 # abbreviate it as "GMT", as it happened to be GMT.
 #
@@ -1171,23 +1146,6 @@ Zone Atlantic/Faroe	-0:27:04 -	LMT	1908 Jan 11 # Tórshavn
 # 2. The shift *from* DST in 2023 happens as normal, but coincides with the
 #    shift to UTC-02 normaltime (people will not change their clocks here).
 # 3. After this, DST is still observed, but as -02/-01 instead of -03/-02.
-#
-# From Múte Bourup Egede via Jógvan Svabo Samuelsen (2023-03-15):
-# Greenland will not switch to Daylight Saving Time this year, 2023,
-# because the standard time for Greenland will change from UTC -3 to UTC -2.
-# However, Greenland will change to Daylight Saving Time again in 2024
-# and onwards.
-
-# From a contributor who wishes to remain anonymous for now (2023-10-29):
-# https://www.dr.dk/nyheder/seneste/i-nat-skal-uret-stilles-en-time-tilbage-men-foerste-gang-sker-det-ikke-i-groenland
-# with a link to that page:
-# https://naalakkersuisut.gl/Nyheder/2023/10/2710_sommertid
-# ... Ittoqqortoormiit joins the time of Nuuk at March 2024.
-# What would mean that America/Scoresbysund would either be in -01 year round
-# or in -02/-01 like America/Nuuk, but no longer in -01/+00.
-#
-# From Paul Eggert (2023-10-29):
-# For now, assume it will be like America/Nuuk.
 
 # Rule	NAME	FROM	TO	-	IN	ON	AT	SAVE	LETTER/S
 Rule	Thule	1991	1992	-	Mar	lastSun	2:00	1:00	D
@@ -1208,12 +1166,10 @@ Zone America/Danmarkshavn -1:14:40 -	LMT	1916 Jul 28
 Zone America/Scoresbysund -1:27:52 -	LMT	1916 Jul 28 # Ittoqqortoormiit
 			-2:00	-	-02	1980 Apr  6  2:00
 			-2:00	C-Eur	-02/-01	1981 Mar 29
-			-1:00	EU	-01/+00 2024 Mar 31
-			-2:00	EU	-02/-01
+			-1:00	EU	-01/+00
 Zone America/Nuuk	-3:26:56 -	LMT	1916 Jul 28 # Godthåb
 			-3:00	-	-03	1980 Apr  6  2:00
-			-3:00	EU	-03/-02	2023 Mar 26  1:00u
-			-2:00	-	-02	2023 Oct 29  1:00u
+			-3:00	EU	-03/-02	2023 Oct 29  1:00u
 			-2:00	EU	-02/-01
 Zone America/Thule	-4:35:08 -	LMT	1916 Jul 28 # Pituffik
 			-4:00	Thule	A%sT
@@ -3778,7 +3734,11 @@ Zone	Europe/Istanbul	1:55:52 -	LMT	1880
 # and not at 3:00 as would have been under EU rules.
 # This is why I have set the change to EU rules into May 1996,
 # so that the change in March is stil covered by the Ukraine rule.
-# The next change in October 1996 happened under EU rules.
+# The next change in October 1996 happened under EU rules....
+# TZ database holds three other zones for Ukraine.... I have not yet
+# worked out the consequences for these three zones, as we (me and my
+# US colleague David Cochrane) are still trying to get more
+# information upon these local deviations from Kiev rules.
 #
 # From Paul Eggert (2022-08-27):
 # For now, assume that Ukraine's zones all followed the same rules,

make/data/tzdata/iso3166.tab

@@ -26,22 +26,17 @@
 # This file is in the public domain, so clarified as of
 # 2009-05-17 by Arthur David Olson.
 #
-# From Paul Eggert (2023-09-06):
+# From Paul Eggert (2022-11-18):
 # This file contains a table of two-letter country codes.  Columns are
 # separated by a single tab.  Lines beginning with '#' are comments.
 # All text uses UTF-8 encoding.  The columns of the table are as follows:
 #
 # 1.  ISO 3166-1 alpha-2 country code, current as of
-#     ISO/TC 46 N1108 (2023-04-05).  See: ISO/TC 46 Documents
-#     https://www.iso.org/committee/48750.html?view=documents
-# 2.  The usual English name for the coded region.  This sometimes
-#     departs from ISO-listed names, sometimes so that sorted subsets
-#     of names are useful (e.g., "Samoa (American)" and "Samoa
-#     (western)" rather than "American Samoa" and "Samoa"),
-#     sometimes to avoid confusion among non-experts (e.g.,
-#     "Czech Republic" and "Turkey" rather than "Czechia" and "Türkiye"),
-#     and sometimes to omit needless detail or churn (e.g., "Netherlands"
-#     rather than "Netherlands (the)" or "Netherlands (Kingdom of the)").
+#     ISO 3166-1 N1087 (2022-09-02).  See: Updates on ISO 3166-1
+#     https://isotc.iso.org/livelink/livelink/Open/16944257
+# 2.  The usual English name for the coded region,
+#     chosen so that alphabetic sorting of subsets produces helpful lists.
+#     This is not the same as the English name in the ISO 3166 tables.
 #
 # The table is sorted by country code.
 #

make/data/tzdata/leapseconds

@@ -26,10 +26,13 @@
 # This file is in the public domain.
 
 # This file is generated automatically from the data in the public-domain
-# NIST/IERS format leap-seconds.list file, which can be copied from
+# NIST format leap-seconds.list file, which can be copied from
+# <ftp://ftp.nist.gov/pub/time/leap-seconds.list>
+# or <ftp://ftp.boulder.nist.gov/pub/time/leap-seconds.list>.
+# The NIST file is used instead of its IERS upstream counterpart
 # <https://hpiers.obspm.fr/iers/bul/bulc/ntp/leap-seconds.list>
-# or, in a variant with different comments, from
-# <ftp://ftp.boulder.nist.gov/pub/time/leap-seconds.list>.
+# because under US law the NIST file is public domain
+# whereas the IERS file's copyright and license status is unclear.
 # For more about leap-seconds.list, please see
 # The NTP Timescale and Leap Seconds
 # <https://www.eecis.udel.edu/~mills/leap.html>.
@@ -92,11 +95,11 @@ Leap	2016	Dec	31	23:59:60	+	S
 # Any additional leap seconds will come after this.
 # This Expires line is commented out for now,
 # so that pre-2020a zic implementations do not reject this file.
-#Expires 2024	Dec	28	00:00:00
+#Expires 2023	Dec	28	00:00:00
 
 # POSIX timestamps for the data in this file:
-#updated 1704708379 (2024-01-08 10:06:19 UTC)
-#expires 1735344000 (2024-12-28 00:00:00 UTC)
+#updated 1467936000 (2016-07-08 00:00:00 UTC)
+#expires 1703721600 (2023-12-28 00:00:00 UTC)
 
-#	Updated through IERS Bulletin C (https://hpiers.obspm.fr/iers/bul/bulc/bulletinc.dat)
-#	File expires on 28 December 2024
+#	Updated through IERS Bulletin C65
+#	File expires on:  28 December 2023

make/data/tzdata/northamerica

@@ -1,4 +1,3 @@
-#
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -1291,10 +1290,6 @@ Zone America/Menominee	-5:50:27 -	LMT	1885 Sep 18 12:00
 #	<http://cs.ucla.edu/~eggert/The-Waste-of-Daylight-19th.pdf>
 #	[PDF] (1914-03)
 #
-# For the 1911/1912 establishment of standard time in French possessions, see:
-# Société Française de Physique, Recueil de constantes physiques (1913),
-# page 752, 18b.
-#
 # See the 'europe' file for Greenland.
 
 # Canada
@@ -1381,7 +1376,7 @@ Zone America/Menominee	-5:50:27 -	LMT	1885 Sep 18 12:00
 # From Paul Eggert (2014-10-18):
 # H. David Matthews and Mary Vincent's map
 # "It's about TIME", _Canadian Geographic_ (September-October 1998)
-# https://web.archive.org/web/19990827055050/https://canadiangeographic.ca/SO98/geomap.htm
+# http://www.canadiangeographic.ca/Magazine/SO98/alacarte.asp
 # contains detailed boundaries for regions observing nonstandard
 # time and daylight saving time arrangements in Canada circa 1998.
 #
@@ -1480,7 +1475,7 @@ Rule	StJohns	1989	2006	-	Apr	Sun>=1	0:01	1:00	D
 Rule	StJohns	2007	2011	-	Mar	Sun>=8	0:01	1:00	D
 Rule	StJohns	2007	2010	-	Nov	Sun>=1	0:01	0	S
 #
-# St John's has an apostrophe, but POSIX file names can't have apostrophes.
+# St John's has an apostrophe, but Posix file names can't have apostrophes.
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
 Zone America/St_Johns	-3:30:52 -	LMT	1884
 			-3:30:52 StJohns N%sT	1918
@@ -1669,15 +1664,6 @@ Zone America/Moncton	-4:19:08 -	LMT	1883 Dec  9
 #     Some cities in the United States have pushed the deadline back
 #     three weeks and will change over from daylight saving in October.
 
-# From Chris Walton (2024-01-09):
-# The [Toronto] changes in 1947, 1948, and 1949 took place at 2:00 a.m. local
-# time instead of midnight....  Toronto Daily Star - ...
-# April 2, 1947 - Page 39 ... April 7, 1948 - Page 13 ...
-# April 2, 1949 - Page 1 ... April 7, 1949 - Page 24 ...
-# November 25, 1949 - Page 52 ... April 21, 1950 - Page 14 ...
-# September 19, 1950 - Page 46 ... September 20, 1950 - Page 3 ...
-# November 24, 1950 - Page 21
-
 # From Arthur David Olson (2010-07-17):
 #
 # "Standard Time and Time Zones in Canada" appeared in
@@ -1739,9 +1725,13 @@ Rule	Toronto	1927	1937	-	Sep	Sun>=25	2:00	0	S
 Rule	Toronto	1928	1937	-	Apr	Sun>=25	2:00	1:00	D
 Rule	Toronto	1938	1940	-	Apr	lastSun	2:00	1:00	D
 Rule	Toronto	1938	1939	-	Sep	lastSun	2:00	0	S
-Rule	Toronto	1945	1948	-	Sep	lastSun	2:00	0	S
-Rule	Toronto	1946	1973	-	Apr	lastSun	2:00	1:00	D
-Rule	Toronto	1949	1950	-	Nov	lastSun	2:00	0	S
+Rule	Toronto	1945	1946	-	Sep	lastSun	2:00	0	S
+Rule	Toronto	1946	only	-	Apr	lastSun	2:00	1:00	D
+Rule	Toronto	1947	1949	-	Apr	lastSun	0:00	1:00	D
+Rule	Toronto	1947	1948	-	Sep	lastSun	0:00	0	S
+Rule	Toronto	1949	only	-	Nov	lastSun	0:00	0	S
+Rule	Toronto	1950	1973	-	Apr	lastSun	2:00	1:00	D
+Rule	Toronto	1950	only	-	Nov	lastSun	2:00	0	S
 Rule	Toronto	1951	1956	-	Sep	lastSun	2:00	0	S
 # Shanks & Pottenger say Toronto ended DST a week early in 1971,
 # namely on 1971-10-24, but Mark Brader wrote (2003-05-31) that this
@@ -3464,7 +3454,7 @@ Zone	America/Jamaica	-5:07:10 -	LMT	1890        # Kingston
 # Martinique
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
 Zone America/Martinique	-4:04:20 -      LMT	1890        # Fort-de-France
-			-4:04:20 -	FFMT	1911 May  1 # Fort-de-France MT
+			-4:04:20 -	FFMT	1911 May    # Fort-de-France MT
 			-4:00	-	AST	1980 Apr  6
 			-4:00	1:00	ADT	1980 Sep 28
 			-4:00	-	AST
@@ -3571,7 +3561,7 @@ Zone America/Puerto_Rico -4:24:25 -	LMT	1899 Mar 28 12:00 # San Juan
 # St Pierre and Miquelon
 # There are too many St Pierres elsewhere, so we'll use 'Miquelon'.
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
-Zone America/Miquelon	-3:44:40 -	LMT	1911 Jun 15 # St Pierre
+Zone America/Miquelon	-3:44:40 -	LMT	1911 May 15 # St Pierre
 			-4:00	-	AST	1980 May
 			-3:00	-	-03	1987
 			-3:00	Canada	-03/-02

make/data/tzdata/southamerica

@@ -1593,11 +1593,8 @@ Zone Atlantic/Stanley	-3:51:24 -	LMT	1890
 			-3:00	-	-03
 
 # French Guiana
-# For the 1911/1912 establishment of standard time in French possessions, see:
-# Société Française de Physique, Recueil de constantes physiques (1913),
-# page 752, 18b.
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]
-Zone America/Cayenne	-3:29:20 -	LMT	1911 Jul  1
+Zone America/Cayenne	-3:29:20 -	LMT	1911 Jul
 			-4:00	-	-04	1967 Oct
 			-3:00	-	-03
 
@@ -1723,12 +1720,6 @@ Rule	Para	2010	2012	-	Apr	Sun>=8	0:00	0	-
 # From Carlos Raúl Perasso (2014-02-28):
 # Decree 1264 can be found at:
 # http://www.presidencia.gov.py/archivos/documentos/DECRETO1264_ey9r8zai.pdf
-#
-# From Paul Eggert (2023-07-26):
-# Transition dates are now set by Law No. 7115, not by presidential decree.
-# https://www.abc.com.py/politica/2023/07/12/promulgacion-el-cambio-de-hora-sera-por-ley/
-# From Carlos Raúl Perasso (2023-07-27):
-# http://silpy.congreso.gov.py/descarga/ley-144138
 Rule	Para	2013	max	-	Mar	Sun>=22	0:00	0	-
 
 # Zone	NAME		STDOFF	RULES	FORMAT	[UNTIL]

make/data/tzdata/zone.tab

@@ -71,7 +71,7 @@ AR	-3124-06411	America/Argentina/Cordoba	Argentina (most areas: CB, CC, CN, ER,
 AR	-2447-06525	America/Argentina/Salta	Salta (SA, LP, NQ, RN)
 AR	-2411-06518	America/Argentina/Jujuy	Jujuy (JY)
 AR	-2649-06513	America/Argentina/Tucuman	Tucuman (TM)
-AR	-2828-06547	America/Argentina/Catamarca	Catamarca (CT), Chubut (CH)
+AR	-2828-06547	America/Argentina/Catamarca	Catamarca (CT); Chubut (CH)
 AR	-2926-06651	America/Argentina/La_Rioja	La Rioja (LR)
 AR	-3132-06831	America/Argentina/San_Juan	San Juan (SJ)
 AR	-3253-06849	America/Argentina/Mendoza	Mendoza (MZ)
@@ -110,7 +110,7 @@ BN	+0456+11455	Asia/Brunei
 BO	-1630-06809	America/La_Paz
 BQ	+120903-0681636	America/Kralendijk
 BR	-0351-03225	America/Noronha	Atlantic islands
-BR	-0127-04829	America/Belem	Para (east), Amapa
+BR	-0127-04829	America/Belem	Para (east); Amapa
 BR	-0343-03830	America/Fortaleza	Brazil (northeast: MA, PI, CE, RN, PB)
 BR	-0803-03454	America/Recife	Pernambuco
 BR	-0712-04812	America/Araguaina	Tocantins
@@ -130,21 +130,21 @@ BT	+2728+08939	Asia/Thimphu
 BW	-2439+02555	Africa/Gaborone
 BY	+5354+02734	Europe/Minsk
 BZ	+1730-08812	America/Belize
-CA	+4734-05243	America/St_Johns	Newfoundland, Labrador (SE)
-CA	+4439-06336	America/Halifax	Atlantic - NS (most areas), PE
+CA	+4734-05243	America/St_Johns	Newfoundland; Labrador (southeast)
+CA	+4439-06336	America/Halifax	Atlantic - NS (most areas); PE
 CA	+4612-05957	America/Glace_Bay	Atlantic - NS (Cape Breton)
 CA	+4606-06447	America/Moncton	Atlantic - New Brunswick
 CA	+5320-06025	America/Goose_Bay	Atlantic - Labrador (most areas)
 CA	+5125-05707	America/Blanc-Sablon	AST - QC (Lower North Shore)
-CA	+4339-07923	America/Toronto	Eastern - ON & QC (most areas)
+CA	+4339-07923	America/Toronto	Eastern - ON, QC (most areas)
 CA	+6344-06828	America/Iqaluit	Eastern - NU (most areas)
-CA	+484531-0913718	America/Atikokan	EST - ON (Atikokan), NU (Coral H)
-CA	+4953-09709	America/Winnipeg	Central - ON (west), Manitoba
+CA	+484531-0913718	America/Atikokan	EST - ON (Atikokan); NU (Coral H)
+CA	+4953-09709	America/Winnipeg	Central - ON (west); Manitoba
 CA	+744144-0944945	America/Resolute	Central - NU (Resolute)
 CA	+624900-0920459	America/Rankin_Inlet	Central - NU (central)
 CA	+5024-10439	America/Regina	CST - SK (most areas)
 CA	+5017-10750	America/Swift_Current	CST - SK (midwest)
-CA	+5333-11328	America/Edmonton	Mountain - AB, BC(E), NT(E), SK(W)
+CA	+5333-11328	America/Edmonton	Mountain - AB; BC (E); NT (E); SK (W)
 CA	+690650-1050310	America/Cambridge_Bay	Mountain - NU (west)
 CA	+682059-1334300	America/Inuvik	Mountain - NT (west)
 CA	+4906-11631	America/Creston	MST - BC (Creston)
@@ -230,8 +230,8 @@ HT	+1832-07220	America/Port-au-Prince
 HU	+4730+01905	Europe/Budapest
 ID	-0610+10648	Asia/Jakarta	Java, Sumatra
 ID	-0002+10920	Asia/Pontianak	Borneo (west, central)
-ID	-0507+11924	Asia/Makassar	Borneo (east, south), Sulawesi/Celebes, Bali, Nusa Tengarra, Timor (west)
-ID	-0232+14042	Asia/Jayapura	New Guinea (West Papua / Irian Jaya), Malukus/Moluccas
+ID	-0507+11924	Asia/Makassar	Borneo (east, south); Sulawesi/Celebes, Bali, Nusa Tengarra; Timor (west)
+ID	-0232+14042	Asia/Jayapura	New Guinea (West Papua / Irian Jaya); Malukus/Moluccas
 IE	+5320-00615	Europe/Dublin
 IL	+314650+0351326	Asia/Jerusalem
 IM	+5409-00428	Europe/Isle_of_Man
@@ -378,7 +378,7 @@ RU	+4310+13156	Asia/Vladivostok	MSK+07 - Amur River
 RU	+643337+1431336	Asia/Ust-Nera	MSK+07 - Oymyakonsky
 RU	+5934+15048	Asia/Magadan	MSK+08 - Magadan
 RU	+4658+14242	Asia/Sakhalin	MSK+08 - Sakhalin Island
-RU	+6728+15343	Asia/Srednekolymsk	MSK+08 - Sakha (E), N Kuril Is
+RU	+6728+15343	Asia/Srednekolymsk	MSK+08 - Sakha (E); N Kuril Is
 RU	+5301+15839	Asia/Kamchatka	MSK+09 - Kamchatka
 RU	+6445+17729	Asia/Anadyr	MSK+09 - Bering Sea
 RW	-0157+03004	Africa/Kigali
@@ -441,7 +441,7 @@ US	+470659-1011757	America/North_Dakota/Center	Central - ND (Oliver)
 US	+465042-1012439	America/North_Dakota/New_Salem	Central - ND (Morton rural)
 US	+471551-1014640	America/North_Dakota/Beulah	Central - ND (Mercer)
 US	+394421-1045903	America/Denver	Mountain (most areas)
-US	+433649-1161209	America/Boise	Mountain - ID (south), OR (east)
+US	+433649-1161209	America/Boise	Mountain - ID (south); OR (east)
 US	+332654-1120424	America/Phoenix	MST - AZ (except Navajo)
 US	+340308-1181434	America/Los_Angeles	Pacific
 US	+611305-1495401	America/Anchorage	Alaska (most areas)

make/devkit/createJMHBundle.sh

@@ -1,6 +1,6 @@
 #!/bin/bash -e
 #
-# Copyright (c) 2018, 2023, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2018, 2021, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -40,22 +40,10 @@ mkdir -p $BUILD_DIR $JAR_DIR
 cd $JAR_DIR
 rm -f *
 
-fetchJar() {
-  url="https://repo.maven.apache.org/maven2/$1/$2/$3/$2-$3.jar"
-  if command -v curl > /dev/null; then
-      curl -O --fail $url
-  elif command -v wget > /dev/null; then
-      wget $url
-  else
-      echo "Could not find either curl or wget"
-      exit 1
-  fi
-}
-
-fetchJar org/apache/commons commons-math3 $COMMONS_MATH3_VERSION
-fetchJar net/sf/jopt-simple jopt-simple $JOPT_SIMPLE_VERSION
-fetchJar org/openjdk/jmh jmh-core $JMH_VERSION
-fetchJar org/openjdk/jmh jmh-generator-annprocess $JMH_VERSION
+wget https://repo.maven.apache.org/maven2/org/apache/commons/commons-math3/$COMMONS_MATH3_VERSION/commons-math3-$COMMONS_MATH3_VERSION.jar
+wget https://repo.maven.apache.org/maven2/net/sf/jopt-simple/jopt-simple/$JOPT_SIMPLE_VERSION/jopt-simple-$JOPT_SIMPLE_VERSION.jar
+wget https://repo.maven.apache.org/maven2/org/openjdk/jmh/jmh-core/$JMH_VERSION/jmh-core-$JMH_VERSION.jar
+wget https://repo.maven.apache.org/maven2/org/openjdk/jmh/jmh-generator-annprocess/$JMH_VERSION/jmh-generator-annprocess-$JMH_VERSION.jar
 
 tar -cvzf ../$BUNDLE_NAME *
 

make/jdk/src/classes/build/tools/generatecurrencydata/GenerateCurrencyData.java

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2001, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2001, 2020, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -32,7 +32,6 @@ import java.io.FileInputStream;
 import java.io.FileOutputStream;
 import java.io.InputStream;
 import java.text.SimpleDateFormat;
-import java.util.Arrays;
 import java.util.Date;
 import java.util.HashMap;
 import java.util.Locale;
@@ -340,15 +339,9 @@ public class GenerateCurrencyData {
                 validCurrencyCodes.substring(i * 7 + 3, i * 7 + 6));
             checkCurrencyCode(currencyCode);
             int tableEntry = mainTable[(currencyCode.charAt(0) - 'A') * A_TO_Z + (currencyCode.charAt(1) - 'A')];
-
-            // Do not allow a future currency to be classified as an otherCurrency,
-            // otherwise it will leak out into Currency:getAvailableCurrencies
-            boolean futureCurrency = Arrays.asList(specialCaseNewCurrencies).contains(currencyCode);
-            boolean simpleCurrency = (tableEntry & SIMPLE_CASE_COUNTRY_FINAL_CHAR_MASK) == (currencyCode.charAt(2) - 'A');
-
-            // If neither a simple currency, or one defined in the future
-            // then the current currency is applicable to be added to the otherTable
-            if (!futureCurrency && !simpleCurrency) {
+            if (tableEntry == INVALID_COUNTRY_ENTRY ||
+                    (tableEntry & SPECIAL_CASE_COUNTRY_MASK) != 0 ||
+                    (tableEntry & SIMPLE_CASE_COUNTRY_FINAL_CHAR_MASK) != (currencyCode.charAt(2) - 'A')) {
                 if (otherCurrenciesCount == maxOtherCurrencies) {
                     throw new RuntimeException("too many other currencies");
                 }

make/modules/java.desktop/lib/Awt2dLibraries.gmk

@@ -474,6 +474,7 @@ else
     LIBFREETYPE_LIBS := -lfreetype
   endif
 
+  # gcc_ftobjs.c := maybe-uninitialized required for GCC 7 builds.
   $(eval $(call SetupJdkLibrary, BUILD_LIBFREETYPE, \
       NAME := freetype, \
       OPTIMIZATION := HIGHEST, \
@@ -482,6 +483,7 @@ else
       EXTRA_HEADER_DIRS := $(BUILD_LIBFREETYPE_HEADER_DIRS), \
       DISABLED_WARNINGS_microsoft := 4018 4267 4244 4312 4819, \
       DISABLED_WARNINGS_gcc := implicit-fallthrough cast-function-type bad-function-cast dangling-pointer stringop-overflow, \
+      DISABLED_WARNINGS_gcc_ftobjs.c := maybe-uninitialized, \
       LDFLAGS := $(LDFLAGS_JDKLIB) \
           $(call SET_SHARED_LIBRARY_ORIGIN), \
   ))
@@ -516,13 +518,8 @@ else
    # hb-ft.cc is not presently needed, and requires freetype 2.4.2 or later.
    LIBFONTMANAGER_EXCLUDE_FILES += libharfbuzz/hb-ft.cc
 
-   # list of disabled warnings and the compilers for which it was specifically added.
-   # array-bounds         -> GCC 12 on Alpine Linux
-   # parentheses          -> GCC 6
-   # range-loop-analysis  -> clang on Xcode12
-
    HARFBUZZ_DISABLED_WARNINGS_gcc := type-limits missing-field-initializers strict-aliasing \
-        array-bounds parentheses
+        array-bounds
    # noexcept-type required for GCC 7 builds. Not required for GCC 8+.
    # expansion-to-defined required for GCC 9 builds. Not required for GCC 10+.
    HARFBUZZ_DISABLED_WARNINGS_CXX_gcc := reorder delete-non-virtual-dtor strict-overflow \

make/modules/jdk.net/Lib.gmk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2016, 2023 Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2016, 2020, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -27,7 +27,7 @@ include LibCommon.gmk
 
 ################################################################################
 
-ifeq ($(call isTargetOs, linux macosx windows), true)
+ifeq ($(call isTargetOs, linux macosx), true)
 
   $(eval $(call SetupJdkLibrary, BUILD_LIBEXTNET, \
       NAME := extnet, \
@@ -35,9 +35,8 @@ ifeq ($(call isTargetOs, linux macosx windows), true)
       CFLAGS := $(CFLAGS_JDKLIB), \
       LDFLAGS := $(LDFLAGS_JDKLIB) \
           $(call SET_SHARED_LIBRARY_ORIGIN), \
-      LIBS_unix := -ljava, \
+      LIBS := -ljava, \
       LIBS_linux := -ljvm, \
-      LIBS_windows := jvm.lib ws2_32.lib $(WIN_JAVA_LIB), \
   ))
 
   $(BUILD_LIBEXTNET): $(call FindLib, java.base, java)

make/test/BuildTestLib.gmk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2015, 2023, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2015, 2020, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -36,11 +36,9 @@ TEST_LIB_SUPPORT := $(SUPPORT_OUTPUTDIR)/test/lib
 
 $(eval $(call SetupJavaCompilation, BUILD_WB_JAR, \
     TARGET_RELEASE := $(TARGET_RELEASE_NEWJDK_UPGRADED), \
-    SRC := $(TEST_LIB_SOURCE_DIR)/jdk/test/whitebox/, \
+    SRC := $(TEST_LIB_SOURCE_DIR)/sun, \
     BIN := $(TEST_LIB_SUPPORT)/wb_classes, \
     JAR := $(TEST_LIB_SUPPORT)/wb.jar, \
-    DISABLED_WARNINGS := deprecation removal preview, \
-    JAVAC_FLAGS := --enable-preview, \
 ))
 
 TARGETS += $(BUILD_WB_JAR)
@@ -52,14 +50,7 @@ $(eval $(call SetupJavaCompilation, BUILD_TEST_LIB_JAR, \
     BIN := $(TEST_LIB_SUPPORT)/test-lib_classes, \
     HEADERS := $(TEST_LIB_SUPPORT)/test-lib_headers, \
     JAR := $(TEST_LIB_SUPPORT)/test-lib.jar, \
-    DISABLED_WARNINGS := try deprecation rawtypes unchecked serial cast removal preview, \
-    JAVAC_FLAGS := --add-exports java.base/sun.security.util=ALL-UNNAMED \
-        --add-exports java.base/jdk.internal.classfile=ALL-UNNAMED \
-        --add-exports java.base/jdk.internal.classfile.attribute=ALL-UNNAMED \
-        --add-exports java.base/jdk.internal.classfile.constantpool=ALL-UNNAMED \
-        --add-exports java.base/jdk.internal.classfile.java.lang.constant=ALL-UNNAMED \
-        --add-exports java.base/jdk.internal.module=ALL-UNNAMED \
-        --enable-preview, \
+    DISABLED_WARNINGS := try deprecation rawtypes unchecked serial cast, \
 ))
 
 TARGETS += $(BUILD_TEST_LIB_JAR)

make/test/JtregNativeHotspot.gmk

@@ -144,14 +144,12 @@ ifeq ($(call isTargetOs, linux), true)
    NO_FRAMEPOINTER_CFLAGS := -fomit-frame-pointer
 endif
 
-JVMTI_COMMON_INCLUDES=-I$(TOPDIR)/test/lib/jdk/test/lib/jvmti
-
 BUILD_HOTSPOT_JTREG_LIBRARIES_CFLAGS_libNoFramePointer := $(NO_FRAMEPOINTER_CFLAGS)
 # Optimization -O3 needed, HIGH == -O3
 BUILD_HOTSPOT_JTREG_LIBRARIES_OPTIMIZATION_libNoFramePointer := HIGH
 
-BUILD_HOTSPOT_JTREG_LIBRARIES_CFLAGS := -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS $(JVMTI_COMMON_INCLUDES)
-BUILD_HOTSPOT_JTREG_EXECUTABLES_CFLAGS := -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS $(JVMTI_COMMON_INCLUDES)
+BUILD_HOTSPOT_JTREG_LIBRARIES_CFLAGS := -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS
+BUILD_HOTSPOT_JTREG_EXECUTABLES_CFLAGS := -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -D__STDC_CONSTANT_MACROS
 
 BUILD_HOTSPOT_JTREG_LIBRARIES_CFLAGS_libProcessUtils := $(VM_SHARE_INCLUDES)
 

make/test/JtregNativeJdk.gmk

@@ -66,11 +66,9 @@ ifeq ($(call isTargetOs, windows), true)
   BUILD_JDK_JTREG_EXECUTABLES_LIBS_exeCallerAccessTest := jvm.lib
   BUILD_JDK_JTREG_EXECUTABLES_LIBS_exerevokeall := advapi32.lib
   BUILD_JDK_JTREG_LIBRARIES_CFLAGS_libAsyncStackWalk := /EHsc
-  BUILD_JDK_JTREG_LIBRARIES_LIBS_libGetXSpace := $(WIN_LIB_JAVA)
 else
   BUILD_JDK_JTREG_LIBRARIES_LIBS_libstringPlatformChars := -ljava
   BUILD_JDK_JTREG_LIBRARIES_LIBS_libDirectIO := -ljava
-  BUILD_JDK_JTREG_LIBRARIES_LIBS_libGetXSpace := -ljava
   BUILD_JDK_JTREG_EXCLUDE += exerevokeall.c
   ifeq ($(call isTargetOs, linux), true)
     BUILD_JDK_JTREG_LIBRARIES_LIBS_libInheritedChannel := -ljava
@@ -110,8 +108,6 @@ ifeq ($(call isTargetOs, linux), true)
   # stripping during the test libraries' build.
   BUILD_JDK_JTREG_LIBRARIES_CFLAGS_libFib := -g
   BUILD_JDK_JTREG_LIBRARIES_STRIP_SYMBOLS_libFib := false
-  # nio tests' libCreationTimeHelper native needs -ldl linker flag
-  BUILD_JDK_JTREG_LIBRARIES_LIBS_libCreationTimeHelper := -ldl
 endif
 
 # This evaluation is expensive and should only be done if this target was

src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp

@@ -282,8 +282,7 @@ void LIR_Assembler::osr_entry() {
         __ bind(L);
       }
 #endif
-      __ ldr(r19, Address(OSR_buf, slot_offset));
-      __ ldr(r20, Address(OSR_buf, slot_offset + BytesPerWord));
+      __ ldp(r19, r20, Address(OSR_buf, slot_offset));
       __ str(r19, frame_map()->address_for_monitor_lock(i));
       __ str(r20, frame_map()->address_for_monitor_object(i));
     }
@@ -2726,10 +2725,7 @@ void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
   __ verify_oop(obj);
 
   if (tmp != obj) {
-    assert_different_registers(obj, tmp, rscratch1, rscratch2, mdo_addr.base(), mdo_addr.index());
     __ mov(tmp, obj);
-  } else {
-    assert_different_registers(obj, rscratch1, rscratch2, mdo_addr.base(), mdo_addr.index());
   }
   if (do_null) {
     __ cbnz(tmp, update);
@@ -2786,11 +2782,10 @@ void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
           __ cbz(rscratch2, none);
           __ cmp(rscratch2, (u1)TypeEntries::null_seen);
           __ br(Assembler::EQ, none);
-          // There is a chance that the checks above
-          // fail if another thread has just set the
+          // There is a chance that the checks above (re-reading profiling
+          // data from memory) fail if another thread has just set the
           // profiling to this obj's klass
           __ dmb(Assembler::ISHLD);
-          __ eor(tmp, tmp, rscratch2); // get back original value before XOR
           __ ldr(rscratch2, mdo_addr);
           __ eor(tmp, tmp, rscratch2);
           __ andr(rscratch1, tmp, TypeEntries::type_klass_mask);
@@ -2815,10 +2810,6 @@ void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
         __ bind(none);
         // first time here. Set profile type.
         __ str(tmp, mdo_addr);
-#ifdef ASSERT
-        __ andr(tmp, tmp, TypeEntries::type_mask);
-        __ verify_klass_ptr(tmp);
-#endif
       }
     } else {
       // There's a single possible klass at this profile point
@@ -2850,10 +2841,6 @@ void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
 #endif
         // first time here. Set profile type.
         __ str(tmp, mdo_addr);
-#ifdef ASSERT
-        __ andr(tmp, tmp, TypeEntries::type_mask);
-        __ verify_klass_ptr(tmp);
-#endif
       } else {
         assert(ciTypeEntries::valid_ciklass(current_klass) != NULL &&
                ciTypeEntries::valid_ciklass(current_klass) != exact_klass, "inconsistent");

src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2005, 2024, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -167,10 +167,8 @@ LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
   if (index->is_register()) {
     // apply the shift and accumulate the displacement
     if (shift > 0) {
-      // Use long register to avoid overflow when shifting large index values left.
-      LIR_Opr tmp = new_register(T_LONG);
-      __ convert(Bytecodes::_i2l, index, tmp);
-      __ shift_left(tmp, shift, tmp);
+      LIR_Opr tmp = new_pointer_register();
+      __ shift_left(index, shift, tmp);
       index = tmp;
     }
     if (large_disp != 0) {

src/hotspot/cpu/aarch64/interp_masm_aarch64.cpp

@@ -1638,7 +1638,7 @@ void InterpreterMacroAssembler::call_VM_base(Register oop_result,
 }
 
 void InterpreterMacroAssembler::profile_obj_type(Register obj, const Address& mdo_addr) {
-  assert_different_registers(obj, rscratch1, mdo_addr.base(), mdo_addr.index());
+  assert_different_registers(obj, rscratch1);
   Label update, next, none;
 
   verify_oop(obj);
@@ -1660,13 +1660,13 @@ void InterpreterMacroAssembler::profile_obj_type(Register obj, const Address& md
   tbnz(obj, exact_log2(TypeEntries::type_unknown), next);
   // already unknown. Nothing to do anymore.
 
+  ldr(rscratch1, mdo_addr);
   cbz(rscratch1, none);
   cmp(rscratch1, (u1)TypeEntries::null_seen);
   br(Assembler::EQ, none);
-  // There is a chance that the checks above
-  // fail if another thread has just set the
+  // There is a chance that the checks above (re-reading profiling
+  // data from memory) fail if another thread has just set the
   // profiling to this obj's klass
-  eor(obj, obj, rscratch1); // get back original value before XOR
   ldr(rscratch1, mdo_addr);
   eor(obj, obj, rscratch1);
   tst(obj, TypeEntries::type_klass_mask);
@@ -1679,10 +1679,6 @@ void InterpreterMacroAssembler::profile_obj_type(Register obj, const Address& md
   bind(none);
   // first time here. Set profile type.
   str(obj, mdo_addr);
-#ifdef ASSERT
-  andr(obj, obj, TypeEntries::type_mask);
-  verify_klass_ptr(obj);
-#endif
 
   bind(next);
 }

src/hotspot/cpu/aarch64/relocInfo_aarch64.hpp

@@ -29,9 +29,8 @@
   // machine-dependent parts of class relocInfo
  private:
   enum {
-    // AArch64 instructions are always 4 bytes long and 4-aligned, so
-    // the two lowest offset bits can always be discarded.
-    offset_unit        =  4,
+    // Relocations are byte-aligned.
+    offset_unit        =  1,
     // Must be at least 1 for RelocInfo::narrow_oop_in_const.
     format_width       =  1
   };

src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp

@@ -3134,7 +3134,7 @@ void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
         // Klass seen before, nothing to do (regardless of unknown bit).
         //beq(CCR1, do_nothing);
 
-        __ andi_(R0, tmp, TypeEntries::type_unknown);
+        __ andi_(R0, klass, TypeEntries::type_unknown);
         // Already unknown. Nothing to do anymore.
         //bne(CCR0, do_nothing);
         __ crorc(CCR0, Assembler::equal, CCR1, Assembler::equal); // cr0 eq = cr1 eq or cr0 ne

src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2005, 2024, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2012, 2019 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
@@ -164,10 +164,8 @@ LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
   if (index->is_register()) {
     // Apply the shift and accumulate the displacement.
     if (shift > 0) {
-      // Use long register to avoid overflow when shifting large index values left.
-      LIR_Opr tmp = new_register(T_LONG);
-      __ convert(Bytecodes::_i2l, index, tmp);
-      __ shift_left(tmp, shift, tmp);
+      LIR_Opr tmp = new_pointer_register();
+      __ shift_left(index, shift, tmp);
       index = tmp;
     }
     if (large_disp != 0) {

src/hotspot/cpu/ppc/frame_ppc.inline.hpp

@@ -143,6 +143,7 @@ inline intptr_t* frame::interpreter_frame_mdp_addr() const {
   return (intptr_t*) &(get_ijava_state()->mdx);
 }
 
+// Pointer beyond the "oldest/deepest" BasicObjectLock on stack.
 inline BasicObjectLock* frame::interpreter_frame_monitor_end() const {
   return (BasicObjectLock*) get_ijava_state()->monitors;
 }

src/hotspot/cpu/ppc/interp_masm_ppc_64.cpp

@@ -1734,7 +1734,7 @@ void InterpreterMacroAssembler::profile_obj_type(Register obj, Register mdo_addr
   // Klass seen before, nothing to do (regardless of unknown bit).
   //beq(CCR1, do_nothing);
 
-  andi_(R0, tmp, TypeEntries::type_unknown);
+  andi_(R0, klass, TypeEntries::type_unknown);
   // Already unknown. Nothing to do anymore.
   //bne(CCR0, do_nothing);
   crorc(CCR0, Assembler::equal, CCR1, Assembler::equal); // cr0 eq = cr1 eq or cr0 ne
@@ -1933,7 +1933,7 @@ void InterpreterMacroAssembler::profile_parameters_type(Register tmp1, Register
   }
 }
 
-// Add a monitor (see frame_ppc.hpp).
+// Add a InterpMonitorElem to stack (see frame_sparc.hpp).
 void InterpreterMacroAssembler::add_monitor_to_stack(bool stack_is_empty, Register Rtemp1, Register Rtemp2) {
 
   // Very-local scratch registers.

src/hotspot/cpu/ppc/templateTable_ppc_64.cpp

@@ -4045,78 +4045,90 @@ void TemplateTable::athrow() {
 // at next monitor exit.
 void TemplateTable::monitorenter() {
   transition(atos, vtos);
+
   __ verify_oop(R17_tos);
 
-  Register Rcurrent_monitor  = R3_ARG1,
-           Rcurrent_obj      = R4_ARG2,
+  Register Rcurrent_monitor  = R11_scratch1,
+           Rcurrent_obj      = R12_scratch2,
            Robj_to_lock      = R17_tos,
-           Rscratch1         = R11_scratch1,
-           Rscratch2         = R12_scratch2,
-           Rbot              = R5_ARG3,
-           Rfree_slot        = R6_ARG4;
-
-  Label Lfound, Lallocate_new;
-
-  __ ld(Rscratch1, _abi0(callers_sp), R1_SP); // load FP
-  __ li(Rfree_slot, 0); // Points to free slot or null.
-
-  // Set up search loop - start with topmost monitor.
-  __ mr(Rcurrent_monitor, R26_monitor);
-  __ addi(Rbot, Rscratch1, -frame::ijava_state_size);
+           Rscratch1         = R3_ARG1,
+           Rscratch2         = R4_ARG2,
+           Rscratch3         = R5_ARG3,
+           Rcurrent_obj_addr = R6_ARG4;
 
   // ------------------------------------------------------------------------------
   // Null pointer exception.
-  __ null_check_throw(Robj_to_lock, -1, Rscratch1);
+  __ null_check_throw(Robj_to_lock, -1, R11_scratch1);
 
-  // Check if any slot is present => short cut to allocation if not.
-  __ cmpld(CCR0, Rcurrent_monitor, Rbot);
-  __ beq(CCR0, Lallocate_new);
+  // Try to acquire a lock on the object.
+  // Repeat until succeeded (i.e., until monitorenter returns true).
 
   // ------------------------------------------------------------------------------
   // Find a free slot in the monitor block.
-  // Note: The order of the monitors is important for C2 OSR which derives the
-  //       unlock order from it (see comments for interpreter_frame_monitor_*).
+  Label Lfound, Lexit, Lallocate_new;
+  ConditionRegister found_free_slot = CCR0,
+                    found_same_obj  = CCR1,
+                    reached_limit   = CCR6;
   {
-    Label Lloop, LnotFree, Lexit;
+    Label Lloop;
+    Register Rlimit = Rcurrent_monitor;
 
+    // Set up search loop - start with topmost monitor.
+    __ add(Rcurrent_obj_addr, BasicObjectLock::obj_offset_in_bytes(), R26_monitor);
+
+    __ ld(Rlimit, 0, R1_SP);
+    __ addi(Rlimit, Rlimit, - (frame::ijava_state_size + frame::interpreter_frame_monitor_size_in_bytes() - BasicObjectLock::obj_offset_in_bytes())); // Monitor base
+
+    // Check if any slot is present => short cut to allocation if not.
+    __ cmpld(reached_limit, Rcurrent_obj_addr, Rlimit);
+    __ bgt(reached_limit, Lallocate_new);
+
+    // Pre-load topmost slot.
+    __ ld(Rcurrent_obj, 0, Rcurrent_obj_addr);
+    __ addi(Rcurrent_obj_addr, Rcurrent_obj_addr, frame::interpreter_frame_monitor_size() * wordSize);
+    // The search loop.
     __ bind(Lloop);
-    __ ld(Rcurrent_obj, BasicObjectLock::obj_offset_in_bytes(), Rcurrent_monitor);
-    // Exit if current entry is for same object; this guarantees, that new monitor
-    // used for recursive lock is above the older one.
-    __ cmpd(CCR0, Rcurrent_obj, Robj_to_lock);
-    __ beq(CCR0, Lexit); // recursive locking
-
-    __ cmpdi(CCR0, Rcurrent_obj, 0);
-    __ bne(CCR0, LnotFree);
-    __ mr(Rfree_slot, Rcurrent_monitor); // remember free slot closest to the bottom
-    __ bind(LnotFree);
-
-    __ addi(Rcurrent_monitor, Rcurrent_monitor, frame::interpreter_frame_monitor_size_in_bytes());
-    __ cmpld(CCR0, Rcurrent_monitor, Rbot);
-    __ bne(CCR0, Lloop);
-    __ bind(Lexit);
+    // Found free slot?
+    __ cmpdi(found_free_slot, Rcurrent_obj, 0);
+    // Is this entry for same obj? If so, stop the search and take the found
+    // free slot or allocate a new one to enable recursive locking.
+    __ cmpd(found_same_obj, Rcurrent_obj, Robj_to_lock);
+    __ cmpld(reached_limit, Rcurrent_obj_addr, Rlimit);
+    __ beq(found_free_slot, Lexit);
+    __ beq(found_same_obj, Lallocate_new);
+    __ bgt(reached_limit, Lallocate_new);
+    // Check if last allocated BasicLockObj reached.
+    __ ld(Rcurrent_obj, 0, Rcurrent_obj_addr);
+    __ addi(Rcurrent_obj_addr, Rcurrent_obj_addr, frame::interpreter_frame_monitor_size() * wordSize);
+    // Next iteration if unchecked BasicObjectLocks exist on the stack.
+    __ b(Lloop);
   }
 
   // ------------------------------------------------------------------------------
   // Check if we found a free slot.
-  __ cmpdi(CCR0, Rfree_slot, 0);
-  __ bne(CCR0, Lfound);
+  __ bind(Lexit);
+
+  __ addi(Rcurrent_monitor, Rcurrent_obj_addr, -(frame::interpreter_frame_monitor_size() * wordSize) - BasicObjectLock::obj_offset_in_bytes());
+  __ addi(Rcurrent_obj_addr, Rcurrent_obj_addr, - frame::interpreter_frame_monitor_size() * wordSize);
+  __ b(Lfound);
 
   // We didn't find a free BasicObjLock => allocate one.
+  __ align(32, 12);
   __ bind(Lallocate_new);
   __ add_monitor_to_stack(false, Rscratch1, Rscratch2);
-  __ mr(Rfree_slot, R26_monitor);
+  __ mr(Rcurrent_monitor, R26_monitor);
+  __ addi(Rcurrent_obj_addr, R26_monitor, BasicObjectLock::obj_offset_in_bytes());
 
   // ------------------------------------------------------------------------------
   // We now have a slot to lock.
   __ bind(Lfound);
 
   // Increment bcp to point to the next bytecode, so exception handling for async. exceptions work correctly.
-  // The object has already been popped from the stack, so the expression stack looks correct.
+  // The object has already been poped from the stack, so the expression stack looks correct.
   __ addi(R14_bcp, R14_bcp, 1);
 
-  __ std(Robj_to_lock, BasicObjectLock::obj_offset_in_bytes(), Rfree_slot);
-  __ lock_object(Rfree_slot, Robj_to_lock);
+  __ std(Robj_to_lock, 0, Rcurrent_obj_addr);
+  __ lock_object(Rcurrent_monitor, Robj_to_lock);
 
   // Check if there's enough space on the stack for the monitors after locking.
   // This emits a single store.
@@ -4130,40 +4142,46 @@ void TemplateTable::monitorexit() {
   transition(atos, vtos);
   __ verify_oop(R17_tos);
 
-  Register Rcurrent_monitor  = R3_ARG1,
-           Rcurrent_obj      = R4_ARG2,
+  Register Rcurrent_monitor  = R11_scratch1,
+           Rcurrent_obj      = R12_scratch2,
            Robj_to_lock      = R17_tos,
-           Rscratch          = R11_scratch1,
-           Rbot              = R12_scratch2;
-
+           Rcurrent_obj_addr = R3_ARG1,
+           Rlimit            = R4_ARG2;
   Label Lfound, Lillegal_monitor_state;
 
-  __ ld(Rscratch, _abi0(callers_sp), R1_SP); // load FP
-
-  // Set up search loop - start with topmost monitor.
-  __ mr(Rcurrent_monitor, R26_monitor);
-  __ addi(Rbot, Rscratch, -frame::ijava_state_size);
+  // Check corner case: unbalanced monitorEnter / Exit.
+  __ ld(Rlimit, 0, R1_SP);
+  __ addi(Rlimit, Rlimit, - (frame::ijava_state_size + frame::interpreter_frame_monitor_size_in_bytes())); // Monitor base
 
   // Null pointer check.
-  __ null_check_throw(Robj_to_lock, -1, Rscratch);
+  __ null_check_throw(Robj_to_lock, -1, R11_scratch1);
 
-  // Check corner case: unbalanced monitorEnter / Exit.
-  __ cmpld(CCR0, Rcurrent_monitor, Rbot);
-  __ beq(CCR0, Lillegal_monitor_state);
+  __ cmpld(CCR0, R26_monitor, Rlimit);
+  __ bgt(CCR0, Lillegal_monitor_state);
 
   // Find the corresponding slot in the monitors stack section.
   {
     Label Lloop;
 
+    // Start with topmost monitor.
+    __ addi(Rcurrent_obj_addr, R26_monitor, BasicObjectLock::obj_offset_in_bytes());
+    __ addi(Rlimit, Rlimit, BasicObjectLock::obj_offset_in_bytes());
+    __ ld(Rcurrent_obj, 0, Rcurrent_obj_addr);
+    __ addi(Rcurrent_obj_addr, Rcurrent_obj_addr, frame::interpreter_frame_monitor_size() * wordSize);
+
     __ bind(Lloop);
-    __ ld(Rcurrent_obj, BasicObjectLock::obj_offset_in_bytes(), Rcurrent_monitor);
     // Is this entry for same obj?
     __ cmpd(CCR0, Rcurrent_obj, Robj_to_lock);
     __ beq(CCR0, Lfound);
 
-    __ addi(Rcurrent_monitor, Rcurrent_monitor, frame::interpreter_frame_monitor_size_in_bytes());
-    __ cmpld(CCR0, Rcurrent_monitor, Rbot);
-    __ bne(CCR0, Lloop);
+    // Check if last allocated BasicLockObj reached.
+
+    __ ld(Rcurrent_obj, 0, Rcurrent_obj_addr);
+    __ cmpld(CCR0, Rcurrent_obj_addr, Rlimit);
+    __ addi(Rcurrent_obj_addr, Rcurrent_obj_addr, frame::interpreter_frame_monitor_size() * wordSize);
+
+    // Next iteration if unchecked BasicObjectLocks exist on the stack.
+    __ ble(CCR0, Lloop);
   }
 
   // Fell through without finding the basic obj lock => throw up!
@@ -4173,6 +4191,8 @@ void TemplateTable::monitorexit() {
 
   __ align(32, 12);
   __ bind(Lfound);
+  __ addi(Rcurrent_monitor, Rcurrent_obj_addr,
+          -(frame::interpreter_frame_monitor_size() * wordSize) - BasicObjectLock::obj_offset_in_bytes());
   __ unlock_object(Rcurrent_monitor);
 }
 

src/hotspot/cpu/riscv/assembler_riscv.hpp

@@ -308,22 +308,6 @@ public:
     rdy = 0b111,     // in instruction's rm field, selects dynamic rounding mode.In Rounding Mode register, Invalid.
   };
 
-  // handle unaligned access
-  static inline uint16_t ld_c_instr(address addr) {
-    return Bytes::get_native_u2(addr);
-  }
-  static inline void sd_c_instr(address addr, uint16_t c_instr) {
-    Bytes::put_native_u2(addr, c_instr);
-  }
-
-  // handle unaligned access
-  static inline uint32_t ld_instr(address addr) {
-    return Bytes::get_native_u4(addr);
-  }
-  static inline void sd_instr(address addr, uint32_t instr) {
-    Bytes::put_native_u4(addr, instr);
-  }
-
   static inline uint32_t extract(uint32_t val, unsigned msb, unsigned lsb) {
     assert_cond(msb >= lsb && msb <= 31);
     unsigned nbits = msb - lsb + 1;
@@ -348,10 +332,10 @@ public:
     unsigned mask = (1U << nbits) - 1;
     val <<= lsb;
     mask <<= lsb;
-    unsigned target = ld_instr(a);
+    unsigned target = *(unsigned *)a;
     target &= ~mask;
     target |= val;
-    sd_instr(a, target);
+    *(unsigned *)a = target;
   }
 
   static void patch(address a, unsigned bit, unsigned val) {
@@ -1893,10 +1877,10 @@ public:
     uint16_t mask = (1U << nbits) - 1;
     val <<= lsb;
     mask <<= lsb;
-    uint16_t target = ld_c_instr(a);
+    uint16_t target = *(uint16_t *)a;
     target &= ~mask;
     target |= val;
-    sd_c_instr(a, target);
+    *(uint16_t *)a = target;
   }
 
   static void c_patch(address a, unsigned bit, uint16_t val) {
@@ -2782,17 +2766,6 @@ public:
     return uabs(target - branch) < branch_range;
   }
 
-  // Decode the given instruction, checking if it's a 16-bit compressed
-  // instruction and return the address of the next instruction.
-  static address locate_next_instruction(address inst) {
-    // Instruction wider than 16 bits has the two least-significant bits set.
-    if ((0x3 & *inst) == 0x3) {
-      return inst + instruction_size;
-    } else {
-      return inst + compressed_instruction_size;
-    }
-  }
-
   Assembler(CodeBuffer* code) : AbstractAssembler(code), _in_compressible_region(false) {}
 
   virtual ~Assembler() {}

src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp

@@ -1649,11 +1649,10 @@ void LIR_Assembler::check_conflict(ciKlass* exact_klass, intptr_t current_klass,
       __ beqz(t1, none);
       __ mv(t0, (u1)TypeEntries::null_seen);
       __ beq(t0, t1, none);
-      // There is a chance that the checks above
-      // fail if another thread has just set the
+      // There is a chance that the checks above (re-reading profiling
+      // data from memory) fail if another thread has just set the
       // profiling to this obj's klass
       __ membar(MacroAssembler::LoadLoad);
-      __ xorr(tmp, tmp, t1); // get back original value before XOR
       __ ld(t1, mdo_addr);
       __ xorr(tmp, tmp, t1);
       __ andi(t0, tmp, TypeEntries::type_klass_mask);
@@ -1680,10 +1679,6 @@ void LIR_Assembler::check_conflict(ciKlass* exact_klass, intptr_t current_klass,
     __ bind(none);
     // first time here. Set profile type.
     __ sd(tmp, mdo_addr);
-#ifdef ASSERT
-    __ andi(tmp, tmp, TypeEntries::type_mask);
-    __ verify_klass_ptr(tmp);
-#endif
   }
 }
 
@@ -1718,10 +1713,6 @@ void LIR_Assembler::check_no_conflict(ciKlass* exact_klass, intptr_t current_kla
 #endif
     // first time here. Set profile type.
     __ sd(tmp, mdo_addr);
-#ifdef ASSERT
-    __ andi(tmp, tmp, TypeEntries::type_mask);
-    __ verify_klass_ptr(tmp);
-#endif
   } else {
     assert(ciTypeEntries::valid_ciklass(current_klass) != NULL &&
            ciTypeEntries::valid_ciklass(current_klass) != exact_klass, "inconsistent");

src/hotspot/cpu/riscv/c1_LIRGenerator_riscv.cpp

@@ -804,7 +804,7 @@ void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
 }
 
 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
-  ShouldNotReachHere();
+  fatal("vectorizedMismatch intrinsic is not implemented on this platform");
 }
 
 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f

src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp

@@ -489,9 +489,7 @@ void C2_MacroAssembler::string_indexof(Register haystack, Register needle,
   }
   bne(tmp3, skipch, BMSKIP); // if not equal, skipch is bad char
   add(result, haystack, isLL ? nlen_tmp : ch2);
-  // load 8 bytes from source string
-  // if isLL is false then read granularity can be 2
-  load_long_misaligned(ch2, Address(result), ch1, isLL ? 1 : 2); // can use ch1 as temp register here as it will be trashed by next mv anyway
+  ld(ch2, Address(result)); // load 8 bytes from source string
   mv(ch1, tmp6);
   if (isLL) {
     j(BMLOOPSTR1_AFTER_LOAD);
@@ -674,30 +672,10 @@ void C2_MacroAssembler::string_indexof_linearscan(Register haystack, Register ne
     slli(tmp3, result_tmp, haystack_chr_shift); // result as tmp
     add(haystack, haystack, tmp3);
     neg(hlen_neg, tmp3);
-    if (AvoidUnalignedAccesses) {
-      // preload first value, then we will read by 1 character per loop, instead of four
-      // just shifting previous ch2 right by size of character in bits
-      add(tmp3, haystack, hlen_neg);
-      (this->*load_4chr)(ch2, Address(tmp3), noreg);
-      if (isLL) {
-        // need to erase 1 most significant byte in 32-bit value of ch2
-        slli(ch2, ch2, 40);
-        srli(ch2, ch2, 32);
-      } else {
-        slli(ch2, ch2, 16); // 2 most significant bytes will be erased by this operation
-      }
-    }
 
     bind(CH1_LOOP);
-    add(tmp3, haystack, hlen_neg);
-    if (AvoidUnalignedAccesses) {
-      srli(ch2, ch2, isLL ? 8 : 16);
-      (this->*haystack_load_1chr)(tmp3, Address(tmp3, isLL ? 3 : 6), noreg);
-      slli(tmp3, tmp3, isLL ? 24 : 48);
-      add(ch2, ch2, tmp3);
-    } else {
-      (this->*load_4chr)(ch2, Address(tmp3), noreg);
-    }
+    add(ch2, haystack, hlen_neg);
+    (this->*load_4chr)(ch2, Address(ch2), noreg);
     beq(ch1, ch2, MATCH);
     add(hlen_neg, hlen_neg, haystack_chr_size);
     blez(hlen_neg, CH1_LOOP);
@@ -715,23 +693,10 @@ void C2_MacroAssembler::string_indexof_linearscan(Register haystack, Register ne
     slli(tmp3, result_tmp, haystack_chr_shift);
     add(haystack, haystack, tmp3);
     neg(hlen_neg, tmp3);
-    if (AvoidUnalignedAccesses) {
-      // preload first value, then we will read by 1 character per loop, instead of two
-      // just shifting previous ch2 right by size of character in bits
-      add(tmp3, haystack, hlen_neg);
-      (this->*haystack_load_1chr)(ch2, Address(tmp3), noreg);
-      slli(ch2, ch2, isLL ? 8 : 16);
-    }
+
     bind(CH1_LOOP);
     add(tmp3, haystack, hlen_neg);
-    if (AvoidUnalignedAccesses) {
-      srli(ch2, ch2, isLL ? 8 : 16);
-      (this->*haystack_load_1chr)(tmp3, Address(tmp3, isLL ? 1 : 2), noreg);
-      slli(tmp3, tmp3, isLL ? 8 : 16);
-      add(ch2, ch2, tmp3);
-    } else {
-      (this->*load_2chr)(ch2, Address(tmp3), noreg);
-    }
+    (this->*load_2chr)(ch2, Address(tmp3), noreg);
     beq(ch1, ch2, MATCH);
     add(hlen_neg, hlen_neg, haystack_chr_size);
     blez(hlen_neg, CH1_LOOP);
@@ -755,14 +720,7 @@ void C2_MacroAssembler::string_indexof_linearscan(Register haystack, Register ne
 
     bind(FIRST_LOOP);
     add(ch2, haystack, hlen_neg);
-    if (AvoidUnalignedAccesses) {
-      (this->*haystack_load_1chr)(tmp2, Address(ch2, isLL ? 1 : 2), noreg); // we need a temp register, we can safely use hlen_tmp here, which is a synonym for tmp2
-      (this->*haystack_load_1chr)(ch2, Address(ch2), noreg);
-      slli(tmp2, tmp2, isLL ? 8 : 16);
-      add(ch2, ch2, tmp2);
-    } else {
-      (this->*load_2chr)(ch2, Address(ch2), noreg);
-    }
+    (this->*load_2chr)(ch2, Address(ch2), noreg);
     beq(first, ch2, STR1_LOOP);
 
     bind(STR2_NEXT);
@@ -786,7 +744,10 @@ void C2_MacroAssembler::string_indexof_linearscan(Register haystack, Register ne
     bind(DO1);
     (this->*needle_load_1chr)(ch1, Address(needle), noreg);
     sub(result_tmp, haystack_len, 1);
-    slli(tmp3, result_tmp, haystack_chr_shift);
+    mv(tmp3, result_tmp);
+    if (haystack_chr_shift) {
+      slli(tmp3, result_tmp, haystack_chr_shift);
+    }
     add(haystack, haystack, tmp3);
     neg(hlen_neg, tmp3);
 
@@ -861,10 +822,9 @@ void C2_MacroAssembler::string_compare(Register str1, Register str2,
   // load first parts of strings and finish initialization while loading
   {
     if (str1_isL == str2_isL) { // LL or UU
-      // check if str1 and str2 is same pointer
-      beq(str1, str2, DONE);
       // load 8 bytes once to compare
       ld(tmp1, Address(str1));
+      beq(str1, str2, DONE);
       ld(tmp2, Address(str2));
       mv(t0, STUB_THRESHOLD);
       bge(cnt2, t0, STUB);
@@ -907,8 +867,9 @@ void C2_MacroAssembler::string_compare(Register str1, Register str2,
       addi(cnt1, cnt1, 8);
     }
     addi(cnt2, cnt2, isUL ? 4 : 8);
-    bne(tmp1, tmp2, DIFFERENCE);
     bgez(cnt2, TAIL);
+    xorr(tmp3, tmp1, tmp2);
+    bnez(tmp3, DIFFERENCE);
 
     // main loop
     bind(NEXT_WORD);
@@ -937,30 +898,38 @@ void C2_MacroAssembler::string_compare(Register str1, Register str2,
       addi(cnt1, cnt1, 8);
       addi(cnt2, cnt2, 4);
     }
-    bne(tmp1, tmp2, DIFFERENCE);
-    bltz(cnt2, NEXT_WORD);
+    bgez(cnt2, TAIL);
+
+    xorr(tmp3, tmp1, tmp2);
+    beqz(tmp3, NEXT_WORD);
+    j(DIFFERENCE);
     bind(TAIL);
+    xorr(tmp3, tmp1, tmp2);
+    bnez(tmp3, DIFFERENCE);
+    // Last longword.  In the case where length == 4 we compare the
+    // same longword twice, but that's still faster than another
+    // conditional branch.
     if (str1_isL == str2_isL) { // LL or UU
-      load_long_misaligned(tmp1, Address(str1), tmp3, isLL ? 1 : 2);
-      load_long_misaligned(tmp2, Address(str2), tmp3, isLL ? 1 : 2);
+      ld(tmp1, Address(str1));
+      ld(tmp2, Address(str2));
     } else if (isLU) { // LU case
-      load_int_misaligned(tmp1, Address(str1), tmp3, false);
-      load_long_misaligned(tmp2, Address(str2), tmp3, 2);
+      lwu(tmp1, Address(str1));
+      ld(tmp2, Address(str2));
       inflate_lo32(tmp3, tmp1);
       mv(tmp1, tmp3);
     } else { // UL case
-      load_int_misaligned(tmp2, Address(str2), tmp3, false);
-      load_long_misaligned(tmp1, Address(str1), tmp3, 2);
+      lwu(tmp2, Address(str2));
+      ld(tmp1, Address(str1));
       inflate_lo32(tmp3, tmp2);
       mv(tmp2, tmp3);
     }
     bind(TAIL_CHECK);
-    beq(tmp1, tmp2, DONE);
+    xorr(tmp3, tmp1, tmp2);
+    beqz(tmp3, DONE);
 
     // Find the first different characters in the longwords and
     // compute their difference.
     bind(DIFFERENCE);
-    xorr(tmp3, tmp1, tmp2);
     ctzc_bit(result, tmp3, isLL); // count zero from lsb to msb
     srl(tmp1, tmp1, result);
     srl(tmp2, tmp2, result);
@@ -1130,10 +1099,8 @@ void C2_MacroAssembler::arrays_equals(Register a1, Register a2, Register tmp3,
 // and a2 and the length in cnt1.
 // elem_size is the element size in bytes: either 1 or 2.
 // There are two implementations.  For arrays >= 8 bytes, all
-// comparisons (for hw supporting unaligned access: including the final one,
-// which may overlap) are performed 8 bytes at a time.
-// For strings < 8 bytes (and for tails of long strings when
-// AvoidUnalignedAccesses is true), we compare a
+// comparisons (including the final one, which may overlap) are
+// performed 8 bytes at a time.  For strings < 8 bytes, we compare a
 // halfword, then a short, and then a byte.
 
 void C2_MacroAssembler::string_equals(Register a1, Register a2,
@@ -1144,11 +1111,10 @@ void C2_MacroAssembler::string_equals(Register a1, Register a2,
   Register tmp2 = t1;
 
   assert(elem_size == 1 || elem_size == 2, "must be 2 or 1 byte");
-  assert_different_registers(a1, a2, result, cnt1, tmp1, tmp2);
+  assert_different_registers(a1, a2, result, cnt1, t0, t1);
 
   BLOCK_COMMENT("string_equals {");
 
-  beqz(cnt1, SAME);
   mv(result, false);
 
   // Check for short strings, i.e. smaller than wordSize.
@@ -1163,31 +1129,26 @@ void C2_MacroAssembler::string_equals(Register a1, Register a2,
     add(a2, a2, wordSize);
     sub(cnt1, cnt1, wordSize);
     bne(tmp1, tmp2, DONE);
-  } bgez(cnt1, NEXT_WORD);
+  } bgtz(cnt1, NEXT_WORD);
 
-  if (!AvoidUnalignedAccesses) {
-    // Last longword.  In the case where length == 4 we compare the
-    // same longword twice, but that's still faster than another
-    // conditional branch.
-    // cnt1 could be 0, -1, -2, -3, -4 for chars; -4 only happens when
-    // length == 4.
-    add(tmp1, a1, cnt1);
-    ld(tmp1, Address(tmp1, 0));
-    add(tmp2, a2, cnt1);
-    ld(tmp2, Address(tmp2, 0));
-    bne(tmp1, tmp2, DONE);
-    j(SAME);
-  } else {
-    add(tmp1, cnt1, wordSize);
-    beqz(tmp1, SAME);
-  }
+  // Last longword.  In the case where length == 4 we compare the
+  // same longword twice, but that's still faster than another
+  // conditional branch.
+  // cnt1 could be 0, -1, -2, -3, -4 for chars; -4 only happens when
+  // length == 4.
+  add(tmp1, a1, cnt1);
+  ld(tmp1, Address(tmp1, 0));
+  add(tmp2, a2, cnt1);
+  ld(tmp2, Address(tmp2, 0));
+  bne(tmp1, tmp2, DONE);
+  j(SAME);
 
   bind(SHORT);
   Label TAIL03, TAIL01;
 
   // 0-7 bytes left.
-  test_bit(tmp1, cnt1, 2);
-  beqz(tmp1, TAIL03);
+  test_bit(t0, cnt1, 2);
+  beqz(t0, TAIL03);
   {
     lwu(tmp1, Address(a1, 0));
     add(a1, a1, 4);
@@ -1198,8 +1159,8 @@ void C2_MacroAssembler::string_equals(Register a1, Register a2,
 
   bind(TAIL03);
   // 0-3 bytes left.
-  test_bit(tmp1, cnt1, 1);
-  beqz(tmp1, TAIL01);
+  test_bit(t0, cnt1, 1);
+  beqz(t0, TAIL01);
   {
     lhu(tmp1, Address(a1, 0));
     add(a1, a1, 2);
@@ -1211,8 +1172,8 @@ void C2_MacroAssembler::string_equals(Register a1, Register a2,
   bind(TAIL01);
   if (elem_size == 1) { // Only needed when comparing 1-byte elements
     // 0-1 bytes left.
-    test_bit(tmp1, cnt1, 0);
-    beqz(tmp1, SAME);
+    test_bit(t0, cnt1, 0);
+    beqz(t0, SAME);
     {
       lbu(tmp1, Address(a1, 0));
       lbu(tmp2, Address(a2, 0));

src/hotspot/cpu/riscv/gc/shared/barrierSetNMethod_riscv.cpp

@@ -84,11 +84,11 @@ static const struct CheckInsn barrierInsn[] = {
 // BarrierSetAssembler::nmethod_entry_barrier. The matching ignores the specific
 // register numbers and immediate values in the encoding.
 void NativeNMethodBarrier::verify() const {
-  address addr = instruction_address();
+  intptr_t addr = (intptr_t) instruction_address();
   for(unsigned int i = 0; i < sizeof(barrierInsn)/sizeof(struct CheckInsn); i++ ) {
-    uint32_t inst = Assembler::ld_instr(addr);
+    uint32_t inst = *((uint32_t*) addr);
     if ((inst & barrierInsn[i].mask) != barrierInsn[i].bits) {
-      tty->print_cr("Addr: " INTPTR_FORMAT " Code: 0x%x", p2i(addr), inst);
+      tty->print_cr("Addr: " INTPTR_FORMAT " Code: 0x%x", addr, inst);
       fatal("not an %s instruction.", barrierInsn[i].name);
     }
     addr += 4;

src/hotspot/cpu/riscv/icache_riscv.cpp

@@ -1,7 +1,6 @@
 /*
- * Copyright (c) 1997, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2020, 2022, Huawei Technologies Co., Ltd. All rights reserved.
- * Copyright (c) 2023, Rivos Inc. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -26,8 +25,6 @@
 
 #include "precompiled.hpp"
 #include "asm/macroAssembler.hpp"
-#include "riscv_flush_icache.hpp"
-#include "runtime/java.hpp"
 #include "runtime/icache.hpp"
 
 #define __ _masm->
@@ -36,22 +33,16 @@ static int icache_flush(address addr, int lines, int magic) {
   // To make a store to instruction memory visible to all RISC-V harts,
   // the writing hart has to execute a data FENCE before requesting that
   // all remote RISC-V harts execute a FENCE.I.
-
-  // We need to make sure stores happens before the I/D cache synchronization.
+  //
+  // No sush assurance is defined at the interface level of the builtin
+  // method, and so we should make sure it works.
   __asm__ volatile("fence rw, rw" : : : "memory");
 
-  RiscvFlushIcache::flush((uintptr_t)addr, ((uintptr_t)lines) << ICache::log2_line_size);
-
+  __builtin___clear_cache(addr, addr + (lines << ICache::log2_line_size));
   return magic;
 }
 
 void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {
-  // Only riscv_flush_icache is supported as I-cache synchronization.
-  // We must make sure the VM can execute such without error.
-  if (!RiscvFlushIcache::test()) {
-    vm_exit_during_initialization("Unable to synchronize I-cache");
-  }
-
   address start = (address)icache_flush;
   *flush_icache_stub = (ICache::flush_icache_stub_t)start;
 

src/hotspot/cpu/riscv/interp_masm_riscv.cpp

@@ -176,15 +176,8 @@ void InterpreterMacroAssembler::check_and_handle_earlyret(Register java_thread)
 
 void InterpreterMacroAssembler::get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset) {
   assert(bcp_offset >= 0, "bcp is still pointing to start of bytecode");
-  if (AvoidUnalignedAccesses && (bcp_offset % 2)) {
-    lbu(t1, Address(xbcp, bcp_offset));
-    lbu(reg, Address(xbcp, bcp_offset + 1));
-    slli(t1, t1, 8);
-    add(reg, reg, t1);
-  } else {
-    lhu(reg, Address(xbcp, bcp_offset));
-    revb_h_h_u(reg, reg);
-  }
+  lhu(reg, Address(xbcp, bcp_offset));
+  revb_h(reg, reg);
 }
 
 void InterpreterMacroAssembler::get_dispatch() {
@@ -197,23 +190,13 @@ void InterpreterMacroAssembler::get_dispatch() {
 }
 
 void InterpreterMacroAssembler::get_cache_index_at_bcp(Register index,
-                                                       Register tmp,
                                                        int bcp_offset,
                                                        size_t index_size) {
   assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
   if (index_size == sizeof(u2)) {
-    if (AvoidUnalignedAccesses) {
-      assert_different_registers(index, tmp);
-      load_unsigned_byte(index, Address(xbcp, bcp_offset));
-      load_unsigned_byte(tmp, Address(xbcp, bcp_offset + 1));
-      slli(tmp, tmp, 8);
-      add(index, index, tmp);
-    } else {
-      load_unsigned_short(index, Address(xbcp, bcp_offset));
-    }
+    load_unsigned_short(index, Address(xbcp, bcp_offset));
   } else if (index_size == sizeof(u4)) {
-    load_int_misaligned(index, Address(xbcp, bcp_offset), tmp, false);
-
+    lwu(index, Address(xbcp, bcp_offset));
     // Check if the secondary index definition is still ~x, otherwise
     // we have to change the following assembler code to calculate the
     // plain index.
@@ -240,8 +223,7 @@ void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache,
                                                            size_t index_size) {
   assert_different_registers(cache, index);
   assert_different_registers(cache, xcpool);
-  // register "cache" is trashed in next shadd, so lets use it as a temporary register
-  get_cache_index_at_bcp(index, cache, bcp_offset, index_size);
+  get_cache_index_at_bcp(index, bcp_offset, index_size);
   assert(sizeof(ConstantPoolCacheEntry) == 4 * wordSize, "adjust code below");
   // Convert from field index to ConstantPoolCacheEntry
   // riscv already has the cache in xcpool so there is no need to
@@ -278,8 +260,7 @@ void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache,
                                                                int bcp_offset,
                                                                size_t index_size) {
   assert_different_registers(cache, tmp);
-  // register "cache" is trashed in next ld, so lets use it as a temporary register
-  get_cache_index_at_bcp(tmp, cache, bcp_offset, index_size);
+  get_cache_index_at_bcp(tmp, bcp_offset, index_size);
   assert(sizeof(ConstantPoolCacheEntry) == 4 * wordSize, "adjust code below");
   // Convert from field index to ConstantPoolCacheEntry index
   // and from word offset to byte offset
@@ -1682,8 +1663,8 @@ void InterpreterMacroAssembler::profile_obj_type(Register obj, const Address& md
   bind(update);
   load_klass(obj, obj);
 
-  ld(tmp, mdo_addr);
-  xorr(obj, obj, tmp);
+  ld(t0, mdo_addr);
+  xorr(obj, obj, t0);
   andi(t0, obj, TypeEntries::type_klass_mask);
   beqz(t0, next); // klass seen before, nothing to
                   // do. The unknown bit may have been
@@ -1693,15 +1674,15 @@ void InterpreterMacroAssembler::profile_obj_type(Register obj, const Address& md
   bnez(t0, next);
   // already unknown. Nothing to do anymore.
 
-  beqz(tmp, none);
-  mv(t0, (u1)TypeEntries::null_seen);
-  beq(tmp, t0, none);
-  // There is a chance that the checks above
-  // fail if another thread has just set the
+  ld(t0, mdo_addr);
+  beqz(t0, none);
+  mv(tmp, (u1)TypeEntries::null_seen);
+  beq(t0, tmp, none);
+  // There is a chance that the checks above (re-reading profiling
+  // data from memory) fail if another thread has just set the
   // profiling to this obj's klass
-  xorr(obj, obj, tmp); // get back original value before XOR
-  ld(tmp, mdo_addr);
-  xorr(obj, obj, tmp);
+  ld(t0, mdo_addr);
+  xorr(obj, obj, t0);
   andi(t0, obj, TypeEntries::type_klass_mask);
   beqz(t0, next);
 
@@ -1712,10 +1693,6 @@ void InterpreterMacroAssembler::profile_obj_type(Register obj, const Address& md
   bind(none);
   // first time here. Set profile type.
   sd(obj, mdo_addr);
-#ifdef ASSERT
-  andi(obj, obj, TypeEntries::type_mask);
-  verify_klass_ptr(obj);
-#endif
 
   bind(next);
 }

src/hotspot/cpu/riscv/interp_masm_riscv.hpp

@@ -113,7 +113,7 @@ class InterpreterMacroAssembler: public MacroAssembler {
   void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2));
   void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2));
   void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2));
-  void get_cache_index_at_bcp(Register index, Register tmp, int bcp_offset, size_t index_size = sizeof(u2));
+  void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2));
   void get_method_counters(Register method, Register mcs, Label& skip);
 
   // Load cpool->resolved_references(index).

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp

@@ -1350,7 +1350,7 @@ static int patch_imm_in_li32(address branch, int32_t target) {
 static long get_offset_of_jal(address insn_addr) {
   assert_cond(insn_addr != NULL);
   long offset = 0;
-  unsigned insn = Assembler::ld_instr(insn_addr);
+  unsigned insn = *(unsigned*)insn_addr;
   long val = (long)Assembler::sextract(insn, 31, 12);
   offset |= ((val >> 19) & 0x1) << 20;
   offset |= (val & 0xff) << 12;
@@ -1363,7 +1363,7 @@ static long get_offset_of_jal(address insn_addr) {
 static long get_offset_of_conditional_branch(address insn_addr) {
   long offset = 0;
   assert_cond(insn_addr != NULL);
-  unsigned insn = Assembler::ld_instr(insn_addr);
+  unsigned insn = *(unsigned*)insn_addr;
   offset = (long)Assembler::sextract(insn, 31, 31);
   offset = (offset << 12) | (((long)(Assembler::sextract(insn, 7, 7) & 0x1)) << 11);
   offset = offset | (((long)(Assembler::sextract(insn, 30, 25) & 0x3f)) << 5);
@@ -1375,35 +1375,35 @@ static long get_offset_of_conditional_branch(address insn_addr) {
 static long get_offset_of_pc_relative(address insn_addr) {
   long offset = 0;
   assert_cond(insn_addr != NULL);
-  offset = ((long)(Assembler::sextract(Assembler::ld_instr(insn_addr), 31, 12))) << 12;                               // Auipc.
-  offset += ((long)Assembler::sextract(Assembler::ld_instr(insn_addr + 4), 31, 20));                                  // Addi/Jalr/Load.
+  offset = ((long)(Assembler::sextract(((unsigned*)insn_addr)[0], 31, 12))) << 12;                                  // Auipc.
+  offset += ((long)Assembler::sextract(((unsigned*)insn_addr)[1], 31, 20));                                         // Addi/Jalr/Load.
   offset = (offset << 32) >> 32;
   return offset;
 }
 
 static address get_target_of_movptr(address insn_addr) {
   assert_cond(insn_addr != NULL);
-  intptr_t target_address = (((int64_t)Assembler::sextract(Assembler::ld_instr(insn_addr), 31, 12)) & 0xfffff) << 29; // Lui.
-  target_address += ((int64_t)Assembler::sextract(Assembler::ld_instr(insn_addr + 4), 31, 20)) << 17;                 // Addi.
-  target_address += ((int64_t)Assembler::sextract(Assembler::ld_instr(insn_addr + 12), 31, 20)) << 6;                 // Addi.
-  target_address += ((int64_t)Assembler::sextract(Assembler::ld_instr(insn_addr + 20), 31, 20));                      // Addi/Jalr/Load.
+  intptr_t target_address = (((int64_t)Assembler::sextract(((unsigned*)insn_addr)[0], 31, 12)) & 0xfffff) << 29;    // Lui.
+  target_address += ((int64_t)Assembler::sextract(((unsigned*)insn_addr)[1], 31, 20)) << 17;                        // Addi.
+  target_address += ((int64_t)Assembler::sextract(((unsigned*)insn_addr)[3], 31, 20)) << 6;                         // Addi.
+  target_address += ((int64_t)Assembler::sextract(((unsigned*)insn_addr)[5], 31, 20));                              // Addi/Jalr/Load.
   return (address) target_address;
 }
 
 static address get_target_of_li64(address insn_addr) {
   assert_cond(insn_addr != NULL);
-  intptr_t target_address = (((int64_t)Assembler::sextract(Assembler::ld_instr(insn_addr), 31, 12)) & 0xfffff) << 44; // Lui.
-  target_address += ((int64_t)Assembler::sextract(Assembler::ld_instr(insn_addr + 4), 31, 20)) << 32;                 // Addi.
-  target_address += ((int64_t)Assembler::sextract(Assembler::ld_instr(insn_addr + 12), 31, 20)) << 20;                // Addi.
-  target_address += ((int64_t)Assembler::sextract(Assembler::ld_instr(insn_addr + 20), 31, 20)) << 8;                 // Addi.
-  target_address += ((int64_t)Assembler::sextract(Assembler::ld_instr(insn_addr + 28), 31, 20));                      // Addi.
+  intptr_t target_address = (((int64_t)Assembler::sextract(((unsigned*)insn_addr)[0], 31, 12)) & 0xfffff) << 44;    // Lui.
+  target_address += ((int64_t)Assembler::sextract(((unsigned*)insn_addr)[1], 31, 20)) << 32;                        // Addi.
+  target_address += ((int64_t)Assembler::sextract(((unsigned*)insn_addr)[3], 31, 20)) << 20;                        // Addi.
+  target_address += ((int64_t)Assembler::sextract(((unsigned*)insn_addr)[5], 31, 20)) << 8;                         // Addi.
+  target_address += ((int64_t)Assembler::sextract(((unsigned*)insn_addr)[7], 31, 20));                              // Addi.
   return (address)target_address;
 }
 
 static address get_target_of_li32(address insn_addr) {
   assert_cond(insn_addr != NULL);
-  intptr_t target_address = (((int64_t)Assembler::sextract(Assembler::ld_instr(insn_addr), 31, 12)) & 0xfffff) << 12; // Lui.
-  target_address += ((int64_t)Assembler::sextract(Assembler::ld_instr(insn_addr + 4), 31, 20));                       // Addiw.
+  intptr_t target_address = (((int64_t)Assembler::sextract(((unsigned*)insn_addr)[0], 31, 12)) & 0xfffff) << 12;    // Lui.
+  target_address += ((int64_t)Assembler::sextract(((unsigned*)insn_addr)[1], 31, 20));                              // Addiw.
   return (address)target_address;
 }
 
@@ -1428,7 +1428,7 @@ int MacroAssembler::pd_patch_instruction_size(address branch, address target) {
   } else {
 #ifdef ASSERT
     tty->print_cr("pd_patch_instruction_size: instruction 0x%x at " INTPTR_FORMAT " could not be patched!\n",
-                  Assembler::ld_instr(branch), p2i(branch));
+                  *(unsigned*)branch, p2i(branch));
     Disassembler::decode(branch - 16, branch + 16);
 #endif
     ShouldNotReachHere();
@@ -1571,28 +1571,6 @@ void MacroAssembler::xorrw(Register Rd, Register Rs1, Register Rs2) {
   sign_extend(Rd, Rd, 32);
 }
 
-// Rd = Rs1 & (~Rd2)
-void MacroAssembler::andn(Register Rd, Register Rs1, Register Rs2) {
-  if (UseZbb) {
-    Assembler::andn(Rd, Rs1, Rs2);
-    return;
-  }
-
-  notr(Rd, Rs2);
-  andr(Rd, Rs1, Rd);
-}
-
-// Rd = Rs1 | (~Rd2)
-void MacroAssembler::orn(Register Rd, Register Rs1, Register Rs2) {
-  if (UseZbb) {
-    Assembler::orn(Rd, Rs1, Rs2);
-    return;
-  }
-
-  notr(Rd, Rs2);
-  orr(Rd, Rs1, Rd);
-}
-
 // Note: load_unsigned_short used to be called load_unsigned_word.
 int MacroAssembler::load_unsigned_short(Register dst, Address src) {
   int off = offset();
@@ -1638,114 +1616,6 @@ void MacroAssembler::store_sized_value(Address dst, Register src, size_t size_in
   }
 }
 
-// granularity is 1 OR 2 bytes per load. dst and src.base() allowed to be the same register
-void MacroAssembler::load_short_misaligned(Register dst, Address src, Register tmp, bool is_signed, int granularity) {
-  if (granularity != 1 && granularity != 2) {
-    ShouldNotReachHere();
-  }
-  if (AvoidUnalignedAccesses && (granularity != 2)) {
-    assert_different_registers(dst, tmp);
-    assert_different_registers(tmp, src.base());
-    is_signed ? lb(tmp, Address(src.base(), src.offset() + 1)) : lbu(tmp, Address(src.base(), src.offset() + 1));
-    slli(tmp, tmp, 8);
-    lbu(dst, src);
-    add(dst, dst, tmp);
-  } else {
-    is_signed ? lh(dst, src) : lhu(dst, src);
-  }
-}
-
-// granularity is 1, 2 OR 4 bytes per load, if granularity 2 or 4 then dst and src.base() allowed to be the same register
-void MacroAssembler::load_int_misaligned(Register dst, Address src, Register tmp, bool is_signed, int granularity) {
-  if (AvoidUnalignedAccesses && (granularity != 4)) {
-    switch(granularity) {
-      case 1:
-        assert_different_registers(dst, tmp, src.base());
-        lbu(dst, src);
-        lbu(tmp, Address(src.base(), src.offset() + 1));
-        slli(tmp, tmp, 8);
-        add(dst, dst, tmp);
-        lbu(tmp, Address(src.base(), src.offset() + 2));
-        slli(tmp, tmp, 16);
-        add(dst, dst, tmp);
-        is_signed ? lb(tmp, Address(src.base(), src.offset() + 3)) : lbu(tmp, Address(src.base(), src.offset() + 3));
-        slli(tmp, tmp, 24);
-        add(dst, dst, tmp);
-        break;
-      case 2:
-        assert_different_registers(dst, tmp);
-        assert_different_registers(tmp, src.base());
-        is_signed ? lh(tmp, Address(src.base(), src.offset() + 2)) : lhu(tmp, Address(src.base(), src.offset() + 2));
-        slli(tmp, tmp, 16);
-        lhu(dst, src);
-        add(dst, dst, tmp);
-        break;
-      default:
-        ShouldNotReachHere();
-    }
-  } else {
-    is_signed ? lw(dst, src) : lwu(dst, src);
-  }
-}
-
-// granularity is 1, 2, 4 or 8 bytes per load, if granularity 4 or 8 then dst and src.base() allowed to be same register
-void MacroAssembler::load_long_misaligned(Register dst, Address src, Register tmp, int granularity) {
-  if (AvoidUnalignedAccesses && (granularity != 8)) {
-    switch(granularity){
-      case 1:
-        assert_different_registers(dst, tmp, src.base());
-        lbu(dst, src);
-        lbu(tmp, Address(src.base(), src.offset() + 1));
-        slli(tmp, tmp, 8);
-        add(dst, dst, tmp);
-        lbu(tmp, Address(src.base(), src.offset() + 2));
-        slli(tmp, tmp, 16);
-        add(dst, dst, tmp);
-        lbu(tmp, Address(src.base(), src.offset() + 3));
-        slli(tmp, tmp, 24);
-        add(dst, dst, tmp);
-        lbu(tmp, Address(src.base(), src.offset() + 4));
-        slli(tmp, tmp, 32);
-        add(dst, dst, tmp);
-        lbu(tmp, Address(src.base(), src.offset() + 5));
-        slli(tmp, tmp, 40);
-        add(dst, dst, tmp);
-        lbu(tmp, Address(src.base(), src.offset() + 6));
-        slli(tmp, tmp, 48);
-        add(dst, dst, tmp);
-        lbu(tmp, Address(src.base(), src.offset() + 7));
-        slli(tmp, tmp, 56);
-        add(dst, dst, tmp);
-        break;
-      case 2:
-        assert_different_registers(dst, tmp, src.base());
-        lhu(dst, src);
-        lhu(tmp, Address(src.base(), src.offset() + 2));
-        slli(tmp, tmp, 16);
-        add(dst, dst, tmp);
-        lhu(tmp, Address(src.base(), src.offset() + 4));
-        slli(tmp, tmp, 32);
-        add(dst, dst, tmp);
-        lhu(tmp, Address(src.base(), src.offset() + 6));
-        slli(tmp, tmp, 48);
-        add(dst, dst, tmp);
-        break;
-      case 4:
-        assert_different_registers(dst, tmp);
-        assert_different_registers(tmp, src.base());
-        lwu(tmp, Address(src.base(), src.offset() + 4));
-        slli(tmp, tmp, 32);
-        lwu(dst, src);
-        add(dst, dst, tmp);
-        break;
-      default:
-        ShouldNotReachHere();
-    }
-  } else {
-    ld(dst, src);
-  }
-}
-
 // reverse bytes in halfword in lower 16 bits and sign-extend
 // Rd[15:0] = Rs[7:0] Rs[15:8] (sign-extend to 64 bits)
 void MacroAssembler::revb_h_h(Register Rd, Register Rs, Register tmp) {
@@ -1906,22 +1776,6 @@ void MacroAssembler::ror_imm(Register dst, Register src, uint32_t shift, Registe
   orr(dst, dst, tmp);
 }
 
-// rotate left with shift bits, 32-bit version
-void MacroAssembler::rolw_imm(Register dst, Register src, uint32_t shift, Register tmp) {
-  if (UseZbb) {
-    // no roliw available
-    roriw(dst, src, 32 - shift);
-    return;
-  }
-
-  assert_different_registers(dst, tmp);
-  assert_different_registers(src, tmp);
-  assert(shift < 32, "shift amount must be < 32");
-  srliw(tmp, src, 32 - shift);
-  slliw(dst, src, shift);
-  orr(dst, dst, tmp);
-}
-
 void MacroAssembler::andi(Register Rd, Register Rn, int64_t imm, Register tmp) {
   if (is_simm12(imm)) {
     and_imm12(Rd, Rn, imm);
@@ -4131,17 +3985,18 @@ void MacroAssembler::ctzc_bit(Register Rd, Register Rs, bool isLL, Register tmp1
 void MacroAssembler::inflate_lo32(Register Rd, Register Rs, Register tmp1, Register tmp2) {
   assert_different_registers(Rd, Rs, tmp1, tmp2);
 
-  mv(tmp1, 0xFF000000); // first byte mask at lower word
-  andr(Rd, Rs, tmp1);
-  for (int i = 0; i < 2; i++) {
-    slli(Rd, Rd, wordSize);
-    srli(tmp1, tmp1, wordSize);
+  mv(tmp1, 0xFF);
+  mv(Rd, zr);
+  for (int i = 0; i <= 3; i++) {
     andr(tmp2, Rs, tmp1);
+    if (i) {
+      slli(tmp2, tmp2, i * 8);
+    }
     orr(Rd, Rd, tmp2);
+    if (i != 3) {
+      slli(tmp1, tmp1, 8);
+    }
   }
-  slli(Rd, Rd, wordSize);
-  andi(tmp2, Rs, 0xFF); // last byte mask at lower word
-  orr(Rd, Rd, tmp2);
 }
 
 // This instruction reads adjacent 4 bytes from the upper half of source register,
@@ -4150,8 +4005,17 @@ void MacroAssembler::inflate_lo32(Register Rd, Register Rs, Register tmp1, Regis
 // Rd: 00A700A600A500A4
 void MacroAssembler::inflate_hi32(Register Rd, Register Rs, Register tmp1, Register tmp2) {
   assert_different_registers(Rd, Rs, tmp1, tmp2);
-  srli(Rs, Rs, 32);   // only upper 32 bits are needed
-  inflate_lo32(Rd, Rs, tmp1, tmp2);
+
+  mv(tmp1, 0xFF00000000);
+  mv(Rd, zr);
+  for (int i = 0; i <= 3; i++) {
+    andr(tmp2, Rs, tmp1);
+    orr(Rd, Rd, tmp2);
+    srli(Rd, Rd, 8);
+    if (i != 3) {
+      slli(tmp1, tmp1, 8);
+    }
+  }
 }
 
 // The size of the blocks erased by the zero_blocks stub.  We must
@@ -4518,17 +4382,11 @@ void MacroAssembler::cmp_l2i(Register dst, Register src1, Register src2, Registe
   bind(done);
 }
 
-void MacroAssembler::test_bit(Register Rd, Register Rs, uint32_t bit_pos) {
+void MacroAssembler::test_bit(Register Rd, Register Rs, uint32_t bit_pos, Register tmp) {
   assert(bit_pos < 64, "invalid bit range");
   if (UseZbs) {
     bexti(Rd, Rs, bit_pos);
     return;
   }
-  int64_t imm = (int64_t)(1UL << bit_pos);
-  if (is_simm12(imm)) {
-    and_imm12(Rd, Rs, imm);
-  } else {
-    srli(Rd, Rs, bit_pos);
-    and_imm12(Rd, Rd, 1);
-  }
+  andi(Rd, Rs, 1UL << bit_pos, tmp);
 }

src/hotspot/cpu/riscv/macroAssembler_riscv.hpp

@@ -407,11 +407,6 @@ class MacroAssembler: public Assembler {
   void load_sized_value(Register dst, Address src, size_t size_in_bytes, bool is_signed, Register dst2 = noreg);
   void store_sized_value(Address dst, Register src, size_t size_in_bytes, Register src2 = noreg);
 
-  // Misaligned loads, will use the best way, according to the AvoidUnalignedAccess flag
-  void load_short_misaligned(Register dst, Address src, Register tmp, bool is_signed, int granularity = 1);
-  void load_int_misaligned(Register dst, Address src, Register tmp, bool is_signed, int granularity = 1);
-  void load_long_misaligned(Register dst, Address src, Register tmp, int granularity = 1);
-
  public:
   // Standard pseudo instructions
   inline void nop() {
@@ -573,9 +568,7 @@ class MacroAssembler: public Assembler {
   void NAME(Register Rs1, Register Rs2, const address dest) {                                            \
     assert_cond(dest != NULL);                                                                           \
     int64_t offset = dest - pc();                                                                        \
-    guarantee(is_simm13(offset) && is_even(offset),                                                      \
-              "offset is invalid: is_simm_13: %s offset: " INT64_FORMAT,                                 \
-              BOOL_TO_STR(is_simm13(offset)), offset);                                                   \
+    guarantee(is_simm13(offset) && ((offset % 2) == 0), "offset is invalid.");                           \
     Assembler::NAME(Rs1, Rs2, offset);                                                                   \
   }                                                                                                      \
   INSN_ENTRY_RELOC(void, NAME(Register Rs1, Register Rs2, address dest, relocInfo::relocType rtype))     \
@@ -736,10 +729,6 @@ public:
   void orrw(Register Rd, Register Rs1, Register Rs2);
   void xorrw(Register Rd, Register Rs1, Register Rs2);
 
-  // logic with negate
-  void andn(Register Rd, Register Rs1, Register Rs2);
-  void orn(Register Rd, Register Rs1, Register Rs2);
-
   // revb
   void revb_h_h(Register Rd, Register Rs, Register tmp = t0);                           // reverse bytes in halfword in lower 16 bits, sign-extend
   void revb_w_w(Register Rd, Register Rs, Register tmp1 = t0, Register tmp2 = t1);      // reverse bytes in lower word, sign-extend
@@ -751,7 +740,6 @@ public:
   void revb(Register Rd, Register Rs, Register tmp1 = t0, Register tmp2 = t1);          // reverse bytes in doubleword
 
   void ror_imm(Register dst, Register src, uint32_t shift, Register tmp = t0);
-  void rolw_imm(Register dst, Register src, uint32_t, Register tmp = t0);
   void andi(Register Rd, Register Rn, int64_t imm, Register tmp = t0);
   void orptr(Address adr, RegisterOrConstant src, Register tmp1 = t0, Register tmp2 = t1);
 
@@ -1144,7 +1132,7 @@ public:
   void shadd(Register Rd, Register Rs1, Register Rs2, Register tmp, int shamt);
 
   // test single bit in Rs, result is set to Rd
-  void test_bit(Register Rd, Register Rs, uint32_t bit_pos);
+  void test_bit(Register Rd, Register Rs, uint32_t bit_pos, Register tmp = t0);
 
   // Here the float instructions with safe deal with some exceptions.
   // e.g. convert from NaN, +Inf, -Inf to int, float, double

src/hotspot/cpu/riscv/nativeInst_riscv.cpp

@@ -42,27 +42,27 @@
 
 Register NativeInstruction::extract_rs1(address instr) {
   assert_cond(instr != NULL);
-  return as_Register(Assembler::extract(Assembler::ld_instr(instr), 19, 15));
+  return as_Register(Assembler::extract(((unsigned*)instr)[0], 19, 15));
 }
 
 Register NativeInstruction::extract_rs2(address instr) {
   assert_cond(instr != NULL);
-  return as_Register(Assembler::extract(Assembler::ld_instr(instr), 24, 20));
+  return as_Register(Assembler::extract(((unsigned*)instr)[0], 24, 20));
 }
 
 Register NativeInstruction::extract_rd(address instr) {
   assert_cond(instr != NULL);
-  return as_Register(Assembler::extract(Assembler::ld_instr(instr), 11, 7));
+  return as_Register(Assembler::extract(((unsigned*)instr)[0], 11, 7));
 }
 
 uint32_t NativeInstruction::extract_opcode(address instr) {
   assert_cond(instr != NULL);
-  return Assembler::extract(Assembler::ld_instr(instr), 6, 0);
+  return Assembler::extract(((unsigned*)instr)[0], 6, 0);
 }
 
 uint32_t NativeInstruction::extract_funct3(address instr) {
   assert_cond(instr != NULL);
-  return Assembler::extract(Assembler::ld_instr(instr), 14, 12);
+  return Assembler::extract(((unsigned*)instr)[0], 14, 12);
 }
 
 bool NativeInstruction::is_pc_relative_at(address instr) {
@@ -206,7 +206,7 @@ void NativeMovConstReg::verify() {
 intptr_t NativeMovConstReg::data() const {
   address addr = MacroAssembler::target_addr_for_insn(instruction_address());
   if (maybe_cpool_ref(instruction_address())) {
-    return Bytes::get_native_u8(addr);
+    return *(intptr_t*)addr;
   } else {
     return (intptr_t)addr;
   }
@@ -215,7 +215,7 @@ intptr_t NativeMovConstReg::data() const {
 void NativeMovConstReg::set_data(intptr_t x) {
   if (maybe_cpool_ref(instruction_address())) {
     address addr = MacroAssembler::target_addr_for_insn(instruction_address());
-    Bytes::put_native_u8(addr, x);
+    *(intptr_t*)addr = x;
   } else {
     // Store x into the instruction stream.
     MacroAssembler::pd_patch_instruction_size(instruction_address(), (address)x);
@@ -231,11 +231,11 @@ void NativeMovConstReg::set_data(intptr_t x) {
     while (iter.next()) {
       if (iter.type() == relocInfo::oop_type) {
         oop* oop_addr = iter.oop_reloc()->oop_addr();
-        Bytes::put_native_u8((address)oop_addr, x);
+        *oop_addr = cast_to_oop(x);
         break;
       } else if (iter.type() == relocInfo::metadata_type) {
         Metadata** metadata_addr = iter.metadata_reloc()->metadata_addr();
-        Bytes::put_native_u8((address)metadata_addr, x);
+        *metadata_addr = (Metadata*)x;
         break;
       }
     }
@@ -343,7 +343,7 @@ bool NativeInstruction::is_sigill_zombie_not_entrant() {
 
 void NativeIllegalInstruction::insert(address code_pos) {
   assert_cond(code_pos != NULL);
-  Assembler::sd_instr(code_pos, 0xffffffff); // all bits ones is permanently reserved as an illegal instruction
+  *(juint*)code_pos = 0xffffffff; // all bits ones is permanently reserved as an illegal instruction
 }
 
 bool NativeInstruction::is_stop() {
@@ -379,7 +379,7 @@ void NativeJump::patch_verified_entry(address entry, address verified_entry, add
     Assembler::patch(pInsn, 19, 12, (offset >> 12) & 0xff);
     Assembler::patch(pInsn, 11, 7, 0); // zero, no link jump
     Assembler::patch(pInsn, 6, 0, 0b1101111); // j, (jal x0 offset)
-    Assembler::sd_instr(verified_entry, insn);
+    *(unsigned int*)verified_entry = insn;
   } else {
     // We use an illegal instruction for marking a method as
     // not_entrant or zombie.
@@ -437,5 +437,5 @@ void NativeMembar::set_kind(uint32_t order_kind) {
   Assembler::patch(pInsn, 23, 20, successor);
 
   address membar = addr_at(0);
-  Assembler::sd_instr(membar, insn);
+  *(unsigned int*) membar = insn;
 }

src/hotspot/cpu/riscv/nativeInst_riscv.hpp

@@ -80,7 +80,7 @@ class NativeInstruction {
     assert_cond(instr != NULL);
     return (extract_opcode(instr) == 0b0010011 && // opcode field
             extract_funct3(instr) == 0b001 &&     // funct3 field, select the type of operation
-            Assembler::extract(Assembler::ld_instr(instr), 25, 20) == shift);    // shamt field
+            Assembler::extract(((unsigned*)instr)[0], 25, 20) == shift);    // shamt field
   }
 
   static Register extract_rs1(address instr);
@@ -203,18 +203,18 @@ class NativeInstruction {
  protected:
   address addr_at(int offset) const    { return address(this) + offset; }
 
-  jint int_at(int offset) const        { return (jint)Bytes::get_native_u4(addr_at(offset)); }
-  juint uint_at(int offset) const      { return Bytes::get_native_u4(addr_at(offset)); }
+  jint int_at(int offset) const        { return *(jint*) addr_at(offset); }
+  juint uint_at(int offset) const      { return *(juint*) addr_at(offset); }
 
-  address ptr_at(int offset) const     { return (address)Bytes::get_native_u8(addr_at(offset)); }
+  address ptr_at(int offset) const     { return *(address*) addr_at(offset); }
 
-  oop  oop_at (int offset) const       { return cast_to_oop(Bytes::get_native_u8(addr_at(offset))); }
+  oop  oop_at (int offset) const       { return *(oop*) addr_at(offset); }
 
 
-  void set_int_at(int offset, jint i)        { Bytes::put_native_u4(addr_at(offset), i); }
-  void set_uint_at(int offset, jint i)       { Bytes::put_native_u4(addr_at(offset), i); }
-  void set_ptr_at (int offset, address ptr)  { Bytes::put_native_u8(addr_at(offset), (u8)ptr); }
-  void set_oop_at (int offset, oop o)        { Bytes::put_native_u8(addr_at(offset), cast_from_oop<u8>(o)); }
+  void set_int_at(int offset, jint  i)        { *(jint*)addr_at(offset) = i; }
+  void set_uint_at(int offset, jint  i)       { *(juint*)addr_at(offset) = i; }
+  void set_ptr_at (int offset, address  ptr)  { *(address*) addr_at(offset) = ptr; }
+  void set_oop_at (int offset, oop  o)        { *(oop*) addr_at(offset) = o; }
 
  public:
 
@@ -485,7 +485,7 @@ class NativeIllegalInstruction: public NativeInstruction {
 };
 
 inline bool NativeInstruction::is_nop()         {
-  uint32_t insn = Assembler::ld_instr(addr_at(0));
+  uint32_t insn = *(uint32_t*)addr_at(0);
   return insn == 0x13;
 }
 
@@ -527,7 +527,7 @@ inline bool is_NativeCallTrampolineStub_at(address addr) {
       (NativeInstruction::extract_rd(addr + instr_size)       == x5) &&
       (NativeInstruction::extract_rs1(addr + instr_size)      == x5) &&
       (NativeInstruction::extract_rs1(addr + 2 * instr_size)  == x5) &&
-      (Assembler::extract(Assembler::ld_instr(addr + 4), 31, 20) == NativeCallTrampolineStub::data_offset)) {
+      (Assembler::extract(((unsigned*)addr)[1], 31, 20) == NativeCallTrampolineStub::data_offset)) {
     return true;
   }
   return false;

src/hotspot/cpu/riscv/register_riscv.hpp

@@ -27,8 +27,6 @@
 #define CPU_RISCV_REGISTER_RISCV_HPP
 
 #include "asm/register.hpp"
-#include "utilities/population_count.hpp"
-#include "utilities/powerOfTwo.hpp"
 
 #define CSR_FFLAGS   0x001        // Floating-Point Accrued Exceptions.
 #define CSR_FRM      0x002        // Floating-Point Dynamic Rounding Mode.
@@ -320,8 +318,6 @@ class ConcreteRegisterImpl : public AbstractRegisterImpl {
   static const int max_vpr;
 };
 
-template <class RegImpl> class RegSetIterator;
-
 // A set of registers
 template<class RegImpl>
 class AbstractRegSet {
@@ -329,7 +325,7 @@ class AbstractRegSet {
 
   AbstractRegSet(uint32_t bitset) : _bitset(bitset) { }
 
-public:
+ public:
   AbstractRegSet() : _bitset(0) { }
 
   AbstractRegSet(RegImpl r1) : _bitset(1 << r1->encoding()) { }
@@ -379,73 +375,11 @@ public:
     return AbstractRegSet(bits);
   }
 
-  uint size() const { return population_count(_bitset); }
-
   uint32_t bits() const { return _bitset; }
-
-private:
-
-  RegImpl first();
-
-public:
-
-  friend class RegSetIterator<RegImpl>;
-
-  RegSetIterator<RegImpl> begin();
 };
 
 typedef AbstractRegSet<Register> RegSet;
 typedef AbstractRegSet<FloatRegister> FloatRegSet;
 typedef AbstractRegSet<VectorRegister> VectorRegSet;
 
-template <class RegImpl>
-class RegSetIterator {
-  AbstractRegSet<RegImpl> _regs;
-
-public:
-  RegSetIterator(AbstractRegSet<RegImpl> x): _regs(x) {}
-  RegSetIterator(const RegSetIterator& mit) : _regs(mit._regs) {}
-
-  RegSetIterator& operator++() {
-    RegImpl r = _regs.first();
-    if (r->is_valid())
-      _regs -= r;
-    return *this;
-  }
-
-  bool operator==(const RegSetIterator& rhs) const {
-    return _regs.bits() == rhs._regs.bits();
-  }
-  bool operator!=(const RegSetIterator& rhs) const {
-    return ! (rhs == *this);
-  }
-
-  RegImpl operator*() {
-    return _regs.first();
-  }
-};
-
-template <class RegImpl>
-inline RegSetIterator<RegImpl> AbstractRegSet<RegImpl>::begin() {
-  return RegSetIterator<RegImpl>(*this);
-}
-
-template <>
-inline Register AbstractRegSet<Register>::first() {
-  uint32_t first = _bitset & -_bitset;
-  return first ? as_Register(exact_log2(first)) : noreg;
-}
-
-template <>
-inline FloatRegister AbstractRegSet<FloatRegister>::first() {
-  uint32_t first = _bitset & -_bitset;
-  return first ? as_FloatRegister(exact_log2(first)) : fnoreg;
-}
-
-template<>
-inline VectorRegister AbstractRegSet<VectorRegister>::first() {
-  uint32_t first = _bitset & -_bitset;
-  return first ? as_VectorRegister(exact_log2(first)) : vnoreg;
-}
-
 #endif // CPU_RISCV_REGISTER_RISCV_HPP

src/hotspot/cpu/riscv/relocInfo_riscv.cpp

@@ -45,7 +45,7 @@ void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
       if (NativeInstruction::is_load_pc_relative_at(addr())) {
         address constptr = (address)code()->oop_addr_at(reloc->oop_index());
         bytes = MacroAssembler::pd_patch_instruction_size(addr(), constptr);
-        assert((address)Bytes::get_native_u8(constptr) == x, "error in oop relocation");
+        assert(*(address*)constptr == x, "error in oop relocation");
       } else {
         bytes = MacroAssembler::patch_oop(addr(), x);
       }

src/hotspot/cpu/riscv/riscv.ad

@@ -2318,7 +2318,7 @@ encode %{
     if (DiagnoseSyncOnValueBasedClasses != 0) {
       __ load_klass(flag, oop);
       __ lwu(flag, Address(flag, Klass::access_flags_offset()));
-      __ test_bit(flag, flag, exact_log2(JVM_ACC_IS_VALUE_BASED_CLASS));
+      __ test_bit(flag, flag, exact_log2(JVM_ACC_IS_VALUE_BASED_CLASS), tmp /* tmp */);
       __ bnez(flag, cont, true /* is_far */);
     }